Linux Renesas SOC kernel development
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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>,
	Koji Matsuoka <koji.matsuoka.xm@renesas.com>,
	dri-devel@lists.freedesktop.org,
	linux-renesas-soc@vger.kernel.org,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	LUU HOAI <hoai.luu.ub@renesas.com>
Subject: Re: [PATCH v3 4/7] drm: rcar-du: lvds: Fix stop sequence
Date: Tue, 24 Jan 2023 00:36:49 +0200	[thread overview]
Message-ID: <Y88MAeONs5GNTNHX@pendragon.ideasonboard.com> (raw)
In-Reply-To: <CAMuHMdVkenq=2PH-mjodFzAtEa5ss_Lx11B26x6tE2Da3DbmKg@mail.gmail.com>

Hi Geert,

On Mon, Jan 23, 2023 at 03:28:08PM +0100, Geert Uytterhoeven wrote:
> On Mon, Jan 23, 2023 at 11:48 AM Tomi Valkeinen wrote:
> > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> >
> > According to hardware manual, LVDCR0 register must be cleared bit by bit
> > when disabling LVDS.
> >
> > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> > Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
> > [tomi.valkeinen: simplified the code a bit]
> > Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> Thanks for your patch!
> 
> > @@ -544,6 +549,27 @@ static void rcar_lvds_atomic_disable(struct drm_bridge *bridge,
> >                                      struct drm_bridge_state *old_bridge_state)
> >  {
> >         struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge);
> > +       u32 lvdcr0;
> > +
> > +       lvdcr0 = rcar_lvds_read(lvds, LVDCR0);
> > +
> > +       lvdcr0 &= ~LVDCR0_LVRES;
> > +       rcar_lvds_write(lvds, LVDCR0, lvdcr0);
> > +
> > +       if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) {
> > +               lvdcr0 &= ~LVDCR0_LVEN;
> > +               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
> > +       }
> > +
> > +       if (lvds->info->quirks & RCAR_LVDS_QUIRK_PWD) {
> > +               lvdcr0 &= ~LVDCR0_PWD;
> > +               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
> > +       }
> > +
> > +       if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_EXT_PLL)) {
> > +               lvdcr0 &= ~LVDCR0_PLLON;
> > +               rcar_lvds_write(lvds, LVDCR0, lvdcr0);
> > +       }
> 
> Please add a comment explaining why there are multiple register writes,
> to avoid an over-zealous janitor "optimizing" the code later.

I'll add this comment at the top of the function:

        /*
         * Clear the LVDCR0 bits in the order specified by the hardware
         * documentation, ending with a write of 0 to the full register to
         * clear all remaining bits.
         */

> >
> >         rcar_lvds_write(lvds, LVDCR0, 0);
> >         rcar_lvds_write(lvds, LVDCR1, 0);

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2023-01-23 22:36 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-23 10:47 [PATCH v3 0/7] drm: rcar-du: Misc patches Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 1/7] drm: rcar-du: dsi: add 'select RESET_CONTROLLER' Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 2/7] drm: rcar-du: lvds: Add runtime PM Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 3/7] drm: rcar-du: lvds: Add reset control Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 4/7] drm: rcar-du: lvds: Fix stop sequence Tomi Valkeinen
2023-01-23 14:28   ` Geert Uytterhoeven
2023-01-23 22:36     ` Laurent Pinchart [this message]
2023-01-23 22:50   ` [PATCH v3.1 " Laurent Pinchart
2023-01-23 10:47 ` [PATCH v3 5/7] drm: rcar-du: Add quirk for H3 ES1.x pclk workaround Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 6/7] drm: rcar-du: Fix setting a reserved bit in DPLLCR Tomi Valkeinen
2023-01-23 10:47 ` [PATCH v3 7/7] drm: rcar-du: Stop accessing non-existant registers on gen4 Tomi Valkeinen

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