* [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add CAN-FD node
2023-01-23 19:06 [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add CAN-FD support Geert Uytterhoeven
@ 2023-01-23 19:06 ` Geert Uytterhoeven
2023-01-23 19:06 ` [PATCH 2/2] arm64: dts: renesas: white-hawk: Add CAN-FD support Geert Uytterhoeven
1 sibling, 0 replies; 4+ messages in thread
From: Geert Uytterhoeven @ 2023-01-23 19:06 UTC (permalink / raw)
To: Magnus Damm
Cc: Wolfram Sang, Ulrich Hecht, linux-renesas-soc, linux-arm-kernel,
linux-kernel, Geert Uytterhoeven
Add device nodes for the CAN-FD interface and the related external CAN
clock on the Renesas R-Car V4H (R8A779G0) SoC.
Based on a patch in the BSP by Kazuya Mizuguch.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
- Add family-specific compatible value,
- Correct reg size,
- Add missing interrupt-names.
---
arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 57 +++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
index 83d1666a2ea16de2..d4cc89e49c68d52e 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
@@ -14,6 +14,13 @@ / {
#address-cells = <2>;
#size-cells = <2>;
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
cluster0_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
@@ -676,6 +683,56 @@ hscif3: serial@e66a0000 {
status = "disabled";
};
+ canfd: can@e6660000 {
+ compatible = "renesas,r8a779g0-canfd",
+ "renesas,rcar-gen4-canfd";
+ reg = <0 0xe6660000 0 0x8500>;
+ interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch_int", "g_int";
+ clocks = <&cpg CPG_MOD 328>,
+ <&cpg CPG_CORE R8A779G0_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>;
+ assigned-clock-rates = <80000000>;
+ power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+
+ channel2 {
+ status = "disabled";
+ };
+
+ channel3 {
+ status = "disabled";
+ };
+
+ channel4 {
+ status = "disabled";
+ };
+
+ channel5 {
+ status = "disabled";
+ };
+
+ channel6 {
+ status = "disabled";
+ };
+
+ channel7 {
+ status = "disabled";
+ };
+ };
+
avb0: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a779g0",
"renesas,etheravb-rcar-gen4";
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] arm64: dts: renesas: white-hawk: Add CAN-FD support
2023-01-23 19:06 [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add CAN-FD support Geert Uytterhoeven
2023-01-23 19:06 ` [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add CAN-FD node Geert Uytterhoeven
@ 2023-01-23 19:06 ` Geert Uytterhoeven
2023-01-24 8:20 ` Sergei Shtylyov
1 sibling, 1 reply; 4+ messages in thread
From: Geert Uytterhoeven @ 2023-01-23 19:06 UTC (permalink / raw)
To: Magnus Damm
Cc: Wolfram Sang, Ulrich Hecht, linux-renesas-soc, linux-arm-kernel,
linux-kernel, Geert Uytterhoeven
Enable confirmed-working CAN-FD channels 0 and 1 on the White-Hawk
development board:
- Channel 0 uses an NXP TJR1443AT CAN transceiver, which is be enabled
through a GPIO,
- Channels 1-7 use Microchip MCP2558FD-H/SN CAN transceivers (not
mounted for channels 4-7), which do not need explicit description,
but channels 2-3 do not seem to work.
Inspired by a patch in the BSP by Kazuya Mizuguch.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
This depends on "[PATCH 2/2] phy: phy-can-transceiver: Add support for
NXP TJR1443"
https://lore.kernel.org/all/0bfa1e4c43632e49c9512b4e7daa970545545dcf.1674037830.git.geert+renesas@glider.be
Changed compared to the BSP:
- Add can_clk,
- Add missing can_transceiver0,
- Disable channels 2-7.
Tested using cansend, candump, and canfdtest.
- Channel 2 does not work: "bus-off" error message.
- Channel 3 does not work:
- Using cansend on another interface, and candump on can3 shows
that nothing is received.
However, my scope does see the data on the bus, and it is not
sent repeatedly, hence it must have been acked by the receiver.
- Using canfdtest on can3 gives:
can3: Message ID mismatch!
expected: 0078: [8] 01 02 03 04 05 06 07 08
received: 0077: [8] 00 01 02 03 04 05 06 07
Note that describing a plain gpio-hog instead of can_transceiver0 is not
sufficient, as the enable signal must not be asserted before
initialization of the CAN-FD controller,
---
.../boot/dts/renesas/r8a779g0-white-hawk.dts | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
index 04a2b6b83e743f32..eff1ef6e2cc83aba 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk.dts
@@ -13,6 +13,33 @@
/ {
model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";
compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";
+
+ can_transceiver0: can-phy0 {
+ compatible = "nxp,tjr1443";
+ #phy-cells = <0>;
+ enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ max-bitrate = <5000000>;
+ };
+};
+
+&can_clk {
+ clock-frequency = <40000000>;
+};
+
+&canfd {
+ pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ channel0 {
+ status = "okay";
+ phys = <&can_transceiver0>;
+ };
+
+ channel1 {
+ status = "okay";
+ };
};
&i2c0 {
@@ -23,3 +50,20 @@ eeprom@51 {
pagesize = <8>;
};
};
+
+&pfc {
+ can_clk_pins: can-clk {
+ groups = "can_clk";
+ function = "can_clk";
+ };
+
+ canfd0_pins: canfd0 {
+ groups = "canfd0_data";
+ function = "canfd0";
+ };
+
+ canfd1_pins: canfd1 {
+ groups = "canfd1_data";
+ function = "canfd1";
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread