[PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE

[PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE

[Rui Qi]

The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built
with -fmin-function-alignment=4. This alignment is only needed so the
patchable-function-entry NOPs, which arch/riscv/Makefile emits under
CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds
where compressed instructions otherwise allow 2-byte function
alignment.

The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit
that is selected whenever the toolchain supports dynamic ftrace, rather
than on whether tracing is actually enabled. As a result every
RISCV_ISA_C=y build gets 4-byte function alignment across the entire
kernel even when function tracing is disabled, needlessly growing the
kernel image and wasting instruction cache for a feature that is not
in use.

Gate the select on DYNAMIC_FTRACE instead, matching the condition under
which arch/riscv/Makefile emits -fpatchable-function-entry, so the
alignment is only applied when it is actually needed.

Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary")
Signed-off-by: Rui Qi <qirui.001@bytedance.com>
---
 arch/riscv/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 66638fc9ba43..0c00f6aa715a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -158,7 +158,7 @@ config RISCV
 	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_DMA_CONTIGUOUS if MMU
 	select HAVE_DYNAMIC_FTRACE if MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)
-	select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C
+	select FUNCTION_ALIGNMENT_4B if DYNAMIC_FTRACE && RISCV_ISA_C
 	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
 	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI)
 	select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE
-- 
2.20.1

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE

[Paul Walmsley]

On Mon, 6 Jul 2026, Rui Qi wrote:

> The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built
> with -fmin-function-alignment=4. This alignment is only needed so the
> patchable-function-entry NOPs, which arch/riscv/Makefile emits under
> CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds
> where compressed instructions otherwise allow 2-byte function
> alignment.
> 
> The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit
> that is selected whenever the toolchain supports dynamic ftrace, rather
> than on whether tracing is actually enabled. As a result every
> RISCV_ISA_C=y build gets 4-byte function alignment across the entire
> kernel even when function tracing is disabled, needlessly growing the
> kernel image and wasting instruction cache for a feature that is not
> in use.
> 
> Gate the select on DYNAMIC_FTRACE instead, matching the condition under
> which arch/riscv/Makefile emits -fpatchable-function-entry, so the
> alignment is only applied when it is actually needed.
> 
> Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary")
> Signed-off-by: Rui Qi <qirui.001@bytedance.com>

Thanks, queued for v7.2-rc.

- Paul


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH] riscv: Gate FUNCTION_ALIGNMENT_4B on DYNAMIC_FTRACE

[David Laight]

On Mon,  6 Jul 2026 21:04:14 +0800
"Rui Qi" <qirui.001@bytedance.com> wrote:

> The FUNCTION_ALIGNMENT_4B select forces the whole kernel to be built
> with -fmin-function-alignment=4. This alignment is only needed so the
> patchable-function-entry NOPs, which arch/riscv/Makefile emits under
> CONFIG_DYNAMIC_FTRACE, can be patched reliably on RISCV_ISA_C=y builds
> where compressed instructions otherwise allow 2-byte function
> alignment.
> 
> The select is currently gated on HAVE_DYNAMIC_FTRACE, a capability bit
> that is selected whenever the toolchain supports dynamic ftrace, rather
> than on whether tracing is actually enabled. As a result every
> RISCV_ISA_C=y build gets 4-byte function alignment across the entire
> kernel even when function tracing is disabled, needlessly growing the
> kernel image and wasting instruction cache for a feature that is not
> in use.

I'd have thought that 4-byte aligning functions would increase performance.
(cache-line aligning is likely to be best, but that adds a lot more bloat.)

	David

> 
> Gate the select on DYNAMIC_FTRACE instead, matching the condition under
> which arch/riscv/Makefile emits -fpatchable-function-entry, so the
> alignment is only applied when it is actually needed.
> 
> Fixes: c41bf4326c7b ("riscv: ftrace: align patchable functions to 4 Byte boundary")
> Signed-off-by: Rui Qi <qirui.001@bytedance.com>
> ---
>  arch/riscv/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 66638fc9ba43..0c00f6aa715a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -158,7 +158,7 @@ config RISCV
>  	select HAVE_DEBUG_KMEMLEAK
>  	select HAVE_DMA_CONTIGUOUS if MMU
>  	select HAVE_DYNAMIC_FTRACE if MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)
> -	select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C
> +	select FUNCTION_ALIGNMENT_4B if DYNAMIC_FTRACE && RISCV_ISA_C
>  	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS
>  	select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI)
>  	select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv