From: Michal Wilczynski <m.wilczynski@samsung.com>
To: Matt Coster <Matt.Coster@imgtec.com>
Cc: Drew Fustini <drew@pdp7.com>, Guo Ren <guoren@kernel.org>,
Fu Wei <wefu@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Philipp Zabel <p.zabel@pengutronix.de>,
Frank Binns <Frank.Binns@imgtec.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Ulf Hansson <ulf.hansson@linaro.org>,
Marek Szyprowski <m.szyprowski@samsung.com>,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v6 8/8] drm/imagination: Enable PowerVR driver for RISC-V
Date: Wed, 25 Jun 2025 14:53:48 +0200 [thread overview]
Message-ID: <0b3d2deb-7f27-4390-b43e-353d4ba17bd7@samsung.com> (raw)
In-Reply-To: <ff96ee1f-23ad-4e7f-9ac1-11f410e459e3@imgtec.com>
On 6/24/25 15:54, Matt Coster wrote:
> On 23/06/2025 12:42, Michal Wilczynski wrote:
>> Several RISC-V boards feature Imagination GPUs that are compatible with
>> the PowerVR driver. An example is the IMG BXM-4-64 GPU on the Lichee Pi
>> 4A board. This commit adjusts the driver's Kconfig dependencies to allow
>> the PowerVR driver to be compiled on the RISC-V architecture.
>>
>> By enabling compilation on RISC-V, we expand support for these GPUs,
>> providing graphics acceleration capabilities and enhancing hardware
>> compatibility on RISC-V platforms.
>>
>> Add a dependency on MMU to fix a build warning on RISC-V configurations
>> without an MMU.
>>
>> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
>> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
>> ---
>> drivers/gpu/drm/imagination/Kconfig | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/imagination/Kconfig b/drivers/gpu/drm/imagination/Kconfig
>> index 5f9fff43d6baadc42ebf48d91729bfbf27e06caa..a7da858a5b301e8f088e3e22f5641feb2e078681 100644
>> --- a/drivers/gpu/drm/imagination/Kconfig
>> +++ b/drivers/gpu/drm/imagination/Kconfig
>> @@ -3,9 +3,10 @@
>>
>> config DRM_POWERVR
>> tristate "Imagination Technologies PowerVR (Series 6 and later) & IMG Graphics"
>> - depends on ARM64
>> + depends on (ARM64 || RISCV)
>
> There were two issues you encountered when enabling COMPILE_TEST in v5,
> both of which are somewhat simple to workaround but expose underlying
> assumptions we made during early development.
>
> The first [1] is due to us assuming a 64-bit platform, which was never a
> problem with the ARM64 dependency, but may actually be a problem with
> RISCV given this allows for 32-bit as well. You should probably make
> this (RISCV && 64BIT) until the implicit 64-bit dependency can be worked
> out.
Yeah will incude that in next revision.
>
> Somewhat related, we also assume a little-endian host. Technically ARM64
> can also be big-endian, you just don't encounter that in the wild too
> often so it's never been a "real" issue. I do wonder if swapping out
> (ARM64 || RISCV) for (64BIT && CPU_LITTLE_ENDIAN) entirely would be a
> reasonable change, perhaps for another day though...
>
> The other [2] is slightly more subtle. To keep things straightforward,
> we currently map CPU pages to GPU pages 1:1, meaning we use the CPU page
> size to define the GPU page size. That GPU page size is configurable,
> but does not support every possible size the CPU could support on any
> architecture. The failing test there was sparc64 with an 8K page size
> causing no GPU page size to be defined. See the #if/#elif ladder at the
> top of pvr_mmu.c for the supported sizes and the doc comment above
> PVR_DEVICE_PAGE_SIZE in pvr_mmu.h for the acknowledgement of the page
> size restrictions.
>
> The "proper" fix here would be for us to make these two sizes
> independent, but that's not a trivial change. The "quick" fix I suppose
> would be to depend on one of the supported page sizes, so maybe
> (PAGE_SIZE_4KB || PAGE_SIZE_16KB || PAGE_SIZE_64KB || PAGE_SIZE_256KB)
> since the larger page sizes appear unsupported (probably for good
> reason).
Thanks for a great explanation !
>
>> depends on DRM
>> depends on PM
>> + depends on MMU
>
> Nit: can you keep this alphabetical?
>
> Cheers,
> Matt
>
> [1]: https://lore.kernel.org/r/202506191323.zD1fszQb-lkp@intel.com/
> [2]: https://lore.kernel.org/r/202506201103.GX6DA9Gx-lkp@intel.com/
>
>> select DRM_EXEC
>> select DRM_GEM_SHMEM_HELPER
>> select DRM_SCHED
>>
>
>
Best regards,
--
Michal Wilczynski <m.wilczynski@samsung.com>
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next prev parent reply other threads:[~2025-06-25 17:36 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20250623114429eucas1p1e74e09e74c5873b2f7f01228073be72a@eucas1p1.samsung.com>
2025-06-23 11:42 ` [PATCH v6 0/8] Add TH1520 GPU support with power sequencing Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver Michal Wilczynski
2025-06-23 14:32 ` Bartosz Golaszewski
2025-06-23 17:20 ` Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 3/8] pmdomain: thead: Instantiate GPU power sequencer via auxiliary bus Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 4/8] drm/imagination: Use pwrseq for TH1520 GPU power management Michal Wilczynski
2025-06-24 13:53 ` Matt Coster
2025-06-25 13:49 ` Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 5/8] dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU compatible Michal Wilczynski
2025-06-24 13:53 ` Matt Coster
2025-06-25 12:45 ` Michal Wilczynski
2025-06-25 13:55 ` Krzysztof Kozlowski
2025-06-25 14:18 ` Michal Wilczynski
2025-06-25 14:41 ` Krzysztof Kozlowski
2025-07-23 9:45 ` Matt Coster
2025-07-23 16:26 ` Michal Wilczynski
2025-07-23 16:50 ` Matt Coster
2025-07-23 18:25 ` Michal Wilczynski
2025-07-25 7:01 ` Krzysztof Kozlowski
2025-06-23 11:42 ` [PATCH v6 6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node Michal Wilczynski
2025-06-23 11:42 ` [PATCH v6 8/8] drm/imagination: Enable PowerVR driver for RISC-V Michal Wilczynski
2025-06-24 13:54 ` Matt Coster
2025-06-25 12:53 ` Michal Wilczynski [this message]
2025-06-24 13:58 ` (subset) [PATCH v6 0/8] Add TH1520 GPU support with power sequencing Bartosz Golaszewski
2025-06-25 10:09 ` Ulf Hansson
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