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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Michal Wilczynski <m.wilczynski@samsung.com>,
	Matt Coster <Matt.Coster@imgtec.com>
Cc: Drew Fustini <drew@pdp7.com>, Guo Ren <guoren@kernel.org>,
	Fu Wei <wefu@redhat.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Frank Binns <Frank.Binns@imgtec.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v6 5/8] dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU compatible
Date: Wed, 25 Jun 2025 16:41:28 +0200	[thread overview]
Message-ID: <27068fd3-92b5-402b-9f3c-fd786db56668@kernel.org> (raw)
In-Reply-To: <d12fd4fb-0adb-40c4-8a0a-c685cd6327b3@samsung.com>

On 25/06/2025 16:18, Michal Wilczynski wrote:
> 
> 
> On 6/25/25 15:55, Krzysztof Kozlowski wrote:
>> On 25/06/2025 14:45, Michal Wilczynski wrote:
>>>
>>>
>>> On 6/24/25 15:53, Matt Coster wrote:
>>>> On 23/06/2025 12:42, Michal Wilczynski wrote:
>>>>> Update the img,powervr-rogue.yaml to include the T-HEAD TH1520 SoC's
>>>>> specific GPU compatible string.
>>>>>
>>>>> The thead,th1520-gpu compatible, along with its full chain
>>>>> img,img-bxm-4-64, and img,img-rogue, is added to the
>>>>> list of recognized GPU types.
>>>>>
>>>>> The power-domains property requirement for img,img-bxm-4-64 is also
>>>>> ensured by adding it to the relevant allOf condition.
>>>>>
>>>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>>>> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
>>>>> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>>>>> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
>>>>> ---
>>>>>  Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 9 ++++++++-
>>>>>  1 file changed, 8 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>>>> index 4450e2e73b3ccf74d29f0e31e2e6687d7cbe5d65..9b241a0c1f5941dc58a1e23970f6d3773d427c22 100644
>>>>> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>>>> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
>>>>> @@ -21,6 +21,11 @@ properties:
>>>>>            # work with newer dts.
>>>>>            - const: img,img-axe
>>>>>            - const: img,img-rogue
>>>>> +      - items:
>>>>> +          - enum:
>>>>> +              - thead,th1520-gpu
>>>>> +          - const: img,img-bxm-4-64
>>>>> +          - const: img,img-rogue
>>>>>        - items:
>>>>>            - enum:
>>>>>                - ti,j721s2-gpu
>>>>> @@ -93,7 +98,9 @@ allOf:
>>>>>        properties:
>>>>>          compatible:
>>>>>            contains:
>>>>> -            const: img,img-axe-1-16m
>>>>> +            enum:
>>>>> +              - img,img-axe-1-16m
>>>>> +              - img,img-bxm-4-64
>>>>
>>>> This isn't right – BXM-4-64 has two power domains like BXS-4-64. I don't
>>>> really know what the right way to handle that in devicetree is given the
>>>> TH1520 appears to expose only a top-level domain for the entire GPU, but
>>>> there are definitely two separate domains underneath that as far as the
>>>> GPU is concerned (see the attached snippet from integration guide).
>>>>
>>>> Since power nodes are ref-counted anyway, do we just use the same node
>>>> for both domains and let the driver up/down-count it twice?
>>>
>>> Hi Matt,
>>>
>>> Thanks for the very helpful insight. That's a great point, it seems the
>>> SoC's design presents a tricky case for the bindings.
>>>
>>> I see what you mean about potentially using the same power domain node
>>> twice. My only hesitation is that it might be a bit unclear for someone
>>> reading the devicetree later. Perhaps another option could be to relax
>>> the constraint for this compatible?
>>>
>>> Krzysztof, we'd be grateful for your thoughts on how to best model this
>>> situation.
>>
>>
>> It's your hardware, you should tell us, not me. I don't know how many
>> power domains you have there, but for sure it is not one AND two domains
>> the same time. It is either one or two, because power domains are not
>> the same as regulator supplies.
> 
> Hi Krzysztof, Matt,
> 
> The img,bxm-4-64 GPU IP itself is designed with two separate power
> domains. The TH1520 SoC, which integrates this GPU, wires both of these
> to a single OS controllable power gate (controlled via mailbox and E902
> co-processor).

This helps... and also sounds a lot like regulator supplies, not power
domains. :/

> 
> This means a devicetree for the TH1520 can only ever provide one power
> domain for the GPU. However, a generic binding for img,bxm-4-64 should

If this was a supply, you would have two supplies. Anyway internal
wirings of GPU do not matter in such case and more important what the
SoC has wired. And it has one power domain.


> account for a future SoC that might implement both power domains.
> 
> That's why I proposed to relax the constraints on the img,bmx-4-64 GPU.

This should be constrained per each device, so 1 for you and 2 for
everyone else.

Best regards,
Krzysztof

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  reply	other threads:[~2025-06-25 18:29 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250623114429eucas1p1e74e09e74c5873b2f7f01228073be72a@eucas1p1.samsung.com>
2025-06-23 11:42 ` [PATCH v6 0/8] Add TH1520 GPU support with power sequencing Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 1/8] power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver Michal Wilczynski
2025-06-23 14:32     ` Bartosz Golaszewski
2025-06-23 17:20       ` Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 2/8] dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 3/8] pmdomain: thead: Instantiate GPU power sequencer via auxiliary bus Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 4/8] drm/imagination: Use pwrseq for TH1520 GPU power management Michal Wilczynski
2025-06-24 13:53     ` Matt Coster
2025-06-25 13:49       ` Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 5/8] dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU compatible Michal Wilczynski
2025-06-24 13:53     ` Matt Coster
2025-06-25 12:45       ` Michal Wilczynski
2025-06-25 13:55         ` Krzysztof Kozlowski
2025-06-25 14:18           ` Michal Wilczynski
2025-06-25 14:41             ` Krzysztof Kozlowski [this message]
2025-07-23  9:45               ` Matt Coster
2025-07-23 16:26                 ` Michal Wilczynski
2025-07-23 16:50                   ` Matt Coster
2025-07-23 18:25                     ` Michal Wilczynski
2025-07-25  7:01                       ` Krzysztof Kozlowski
2025-06-23 11:42   ` [PATCH v6 6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node Michal Wilczynski
2025-06-23 11:42   ` [PATCH v6 8/8] drm/imagination: Enable PowerVR driver for RISC-V Michal Wilczynski
2025-06-24 13:54     ` Matt Coster
2025-06-25 12:53       ` Michal Wilczynski
2025-06-24 13:58   ` (subset) [PATCH v6 0/8] Add TH1520 GPU support with power sequencing Bartosz Golaszewski
2025-06-25 10:09   ` Ulf Hansson

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