From: patchwork-bot+linux-riscv@kernel.org
To: Michael Neuling <michaelneuling@tenstorrent.com>
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
kvm-riscv@lists.infradead.org, palmer@dabbelt.com,
mikey@neuling.org, atishp@rivosinc.com
Subject: Re: [PATCH v2] RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit
Date: Wed, 08 Jan 2025 18:21:06 +0000 [thread overview]
Message-ID: <173636046626.736486.6164615548118337611.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241127041840.419940-1-michaelneuling@tenstorrent.com>
Hello:
This patch was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:
On Wed, 27 Nov 2024 04:18:40 +0000 you wrote:
> This doesn't cause a problem currently as HVIEN isn't used elsewhere
> yet. Found by inspection.
>
> Signed-off-by: Michael Neuling <michaelneuling@tenstorrent.com>
> Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests")
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
> Reviewed-by: Anup Patel <anup@brainfault.org>
>
> [...]
Here is the summary with links:
- [v2] RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit
https://git.kernel.org/riscv/c/ea6398a5af81
You are awesome, thank you!
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prev parent reply other threads:[~2025-01-08 18:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-27 4:18 [PATCH v2] RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit Michael Neuling
2024-12-06 16:49 ` Anup Patel
2025-01-08 18:21 ` patchwork-bot+linux-riscv [this message]
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