From: "Rob Herring (Arm)" <robh@kernel.org>
To: Ben Zong-You Xie <ben717@andestech.com>
Cc: linux-riscv@lists.infradead.org, krzk+dt@kernel.org,
devicetree@vger.kernel.org, tim609@andestech.com,
palmer@dabbelt.com, paul.walmsley@sifive.com,
prabhakar.mahadev-lad.rj@bp.renesas.com,
linux-kernel@vger.kernel.org, tglx@linutronix.de,
aou@eecs.berkeley.edu, daniel.lezcano@linaro.org,
conor+dt@kernel.org, alex@ghiti.fr
Subject: Re: [PATCH 6/9] dt-bindings: cache: ax45mp-cache: allow variable cache-sets for Andes L2 cache
Date: Mon, 7 Apr 2025 09:19:16 -0500 [thread overview]
Message-ID: <174403555555.2295519.2830969748366451702.robh@kernel.org> (raw)
In-Reply-To: <20250407104937.315783-7-ben717@andestech.com>
On Mon, 07 Apr 2025 18:49:34 +0800, Ben Zong-You Xie wrote:
> The current device tree binding for the Andes AX45MP L2 cache enforces
> a fixed number of cache-sets (1024). However, there are 2048 cache-sets in
> the QiLai SoC. This change allows both 1024 and 2048 as valid values for
> "cache-sets".
>
> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
> ---
> .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
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next prev parent reply other threads:[~2025-04-07 14:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-07 10:49 [PATCH 0/9] add Voyager board support Ben Zong-You Xie
2025-04-07 10:49 ` [PATCH 1/9] riscv: add Andes SoC family Kconfig support Ben Zong-You Xie
2025-04-07 10:49 ` [PATCH 2/9] dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings Ben Zong-You Xie
2025-04-07 14:13 ` Rob Herring (Arm)
2025-04-07 10:49 ` [PATCH 3/9] dt-bindings: interrupt-controller: add Andes QiLai PLIC Ben Zong-You Xie
2025-04-07 14:14 ` Rob Herring (Arm)
2025-04-07 10:49 ` [PATCH 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller Ben Zong-You Xie
2025-04-07 14:17 ` Rob Herring
2025-04-21 12:19 ` Ben Zong-You Xie
2025-04-07 10:49 ` [PATCH 5/9] dt-bindings: timer: add Andes machine timer Ben Zong-You Xie
2025-04-07 14:18 ` Rob Herring
2025-04-07 10:49 ` [PATCH 6/9] dt-bindings: cache: ax45mp-cache: allow variable cache-sets for Andes L2 cache Ben Zong-You Xie
2025-04-07 14:19 ` Rob Herring (Arm) [this message]
2025-04-07 10:49 ` [PATCH 7/9] riscv: dts: andes: add QiLai SoC device tree Ben Zong-You Xie
2025-04-07 14:30 ` Krzysztof Kozlowski
2025-04-08 16:43 ` Conor Dooley
2025-04-07 10:49 ` [PATCH 8/9] riscv: dts: andes: add Voyager board " Ben Zong-You Xie
2025-04-07 14:31 ` Krzysztof Kozlowski
2025-04-07 10:49 ` [PATCH 9/9] riscv: defconfig: enable Andes SoC Ben Zong-You Xie
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