From: "Rob Herring (Arm)" <robh@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Conor Dooley <conor.dooley@microchip.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>,
Paul Walmsley <pjw@kernel.org>
Subject: Re: [PATCH v1] dt-bindings: cache: sifive,ccache0: add a pic64gx compatible
Date: Mon, 17 Nov 2025 16:49:48 -0600 [thread overview]
Message-ID: <176341978797.862829.13625647277395076899.robh@kernel.org> (raw)
In-Reply-To: <20251117-colt-carnival-8aab0a900816@spud>
On Mon, 17 Nov 2025 14:24:37 +0000, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
>
> The pic64gx use the same IP than mpfs, therefore add compatibility with
> mpfs as fallback.
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Conor Dooley <conor@kernel.org>
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Paul Walmsley <pjw@kernel.org>
> CC: Samuel Holland <samuel.holland@sifive.com>
> CC: devicetree@vger.kernel.org
> CC: linux-riscv@lists.infradead.org
> CC: linux-kernel@vger.kernel.org
> Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
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prev parent reply other threads:[~2025-11-17 22:50 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-17 14:24 [PATCH v1] dt-bindings: cache: sifive,ccache0: add a pic64gx compatible Conor Dooley
2025-11-17 22:49 ` Rob Herring (Arm) [this message]
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