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From: palmer@sifive.com (Palmer Dabbelt)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 1/2] Move EM_RISCV into elf-em.h
Date: Wed, 24 Oct 2018 13:40:35 -0700	[thread overview]
Message-ID: <20181024204036.8799-2-palmer@sifive.com> (raw)
In-Reply-To: <20181024204036.8799-1-palmer@sifive.com>

This should never have been inside our arch port to begin with, it's
just a relic from when we were maintaining out of tree patches.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 arch/riscv/include/asm/elf.h | 3 ---
 include/uapi/linux/elf-em.h  | 1 +
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index a1ef503d616e..697fc23b0d5a 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -16,9 +16,6 @@
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
 
-/* TODO: Move definition into include/uapi/linux/elf-em.h */
-#define EM_RISCV	0xF3
-
 /*
  * These are used to set parameters in the core dumps.
  */
diff --git a/include/uapi/linux/elf-em.h b/include/uapi/linux/elf-em.h
index 31aa10178335..93722e60204c 100644
--- a/include/uapi/linux/elf-em.h
+++ b/include/uapi/linux/elf-em.h
@@ -41,6 +41,7 @@
 #define EM_TILEPRO	188	/* Tilera TILEPro */
 #define EM_MICROBLAZE	189	/* Xilinx MicroBlaze */
 #define EM_TILEGX	191	/* Tilera TILE-Gx */
+#define EM_RISCV	243	/* RISC-V */
 #define EM_BPF		247	/* Linux BPF - in-kernel virtual machine */
 #define EM_FRV		0x5441	/* Fujitsu FR-V */
 
-- 
2.18.1

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@sifive.com>
To: linux-riscv@lists.infradead.org
Cc: kstewart@linuxfoundation.org, aou@eecs.berkeley.edu,
	wad@chromium.org, paul@paul-moore.com,
	Greg KH <gregkh@linuxfoundation.org>,
	Wesley Terpstra <wesley@sifive.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	linux-kernel@vger.kernel.org, eparis@redhat.com,
	luto@amacapital.net, dhowells@redhat.com, linux-audit@redhat.com,
	pombredanne@nexb.com, david.abdurachmanov@gmail.com,
	tglx@linutronix.de, linux-riscv@lists.infradead.org,
	keescook@chromium.org
Subject: [PATCH 1/2] Move EM_RISCV into elf-em.h
Date: Wed, 24 Oct 2018 13:40:35 -0700	[thread overview]
Message-ID: <20181024204036.8799-2-palmer@sifive.com> (raw)
Message-ID: <20181024204035.Qgf135eVBbynBlYzYep1velMbh_Z_4tJzfhaEYFXB-Q@z> (raw)
In-Reply-To: <20181024204036.8799-1-palmer@sifive.com>

This should never have been inside our arch port to begin with, it's
just a relic from when we were maintaining out of tree patches.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 arch/riscv/include/asm/elf.h | 3 ---
 include/uapi/linux/elf-em.h  | 1 +
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index a1ef503d616e..697fc23b0d5a 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -16,9 +16,6 @@
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
 
-/* TODO: Move definition into include/uapi/linux/elf-em.h */
-#define EM_RISCV	0xF3
-
 /*
  * These are used to set parameters in the core dumps.
  */
diff --git a/include/uapi/linux/elf-em.h b/include/uapi/linux/elf-em.h
index 31aa10178335..93722e60204c 100644
--- a/include/uapi/linux/elf-em.h
+++ b/include/uapi/linux/elf-em.h
@@ -41,6 +41,7 @@
 #define EM_TILEPRO	188	/* Tilera TILEPro */
 #define EM_MICROBLAZE	189	/* Xilinx MicroBlaze */
 #define EM_TILEGX	191	/* Tilera TILE-Gx */
+#define EM_RISCV	243	/* RISC-V */
 #define EM_BPF		247	/* Linux BPF - in-kernel virtual machine */
 #define EM_FRV		0x5441	/* Fujitsu FR-V */
 
-- 
2.18.1


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  parent reply	other threads:[~2018-10-24 20:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-23  1:20 [PULL RFC] RISC-V Patches for the 4.20 Merge Window, Part 1 Palmer Dabbelt
2018-10-23  1:20 ` Palmer Dabbelt
2018-10-23  8:20 ` David Abdurachmanov
2018-10-23  8:20   ` David Abdurachmanov
2018-10-24 20:40   ` [PATCH 0/2] RISC-V: Add support for SECCOMP Palmer Dabbelt
2018-10-24 20:40     ` Palmer Dabbelt
2018-10-24 20:40     ` Palmer Dabbelt [this message]
2018-10-24 20:40       ` [PATCH 1/2] Move EM_RISCV into elf-em.h Palmer Dabbelt
2018-10-24 21:26       ` Kees Cook
2018-10-24 21:26         ` Kees Cook
2018-10-25  3:04       ` Paul Walmsley
2018-10-25  3:04         ` Paul Walmsley
2018-10-27  7:46       ` Christoph Hellwig
2018-10-27  7:46         ` Christoph Hellwig
2018-10-27  9:10         ` David Abdurachmanov
2018-10-27  9:10           ` David Abdurachmanov
2018-10-24 20:40     ` [PATCH 2/2] RISC-V: Add support for SECCOMP Palmer Dabbelt
2018-10-24 20:40       ` Palmer Dabbelt
2018-10-24 21:42       ` Kees Cook
2018-10-24 21:42         ` Kees Cook
2018-10-24 22:34         ` Kees Cook
2018-10-24 22:34           ` Kees Cook
2018-10-25 21:02         ` Andy Lutomirski
2018-10-25 21:02           ` Andy Lutomirski
2018-10-27  6:07           ` Palmer Dabbelt
2018-10-27  6:07             ` Palmer Dabbelt
2018-10-25 18:31       ` David Abdurachmanov
2018-10-25 18:31         ` David Abdurachmanov
2018-10-25 20:36         ` Paul Moore
2018-10-25 20:36           ` Paul Moore
2018-10-28 11:07           ` David Abdurachmanov
2018-10-28 11:07             ` David Abdurachmanov
2018-10-29 20:27             ` Palmer Dabbelt
2018-10-29 20:27               ` Palmer Dabbelt
2018-11-02 13:32               ` David Abdurachmanov
2018-11-02 13:32                 ` David Abdurachmanov
2018-11-02 15:51                 ` Kees Cook
2018-11-02 15:51                   ` Kees Cook
2018-10-27  6:07         ` Palmer Dabbelt
2018-10-27  6:07           ` Palmer Dabbelt
2018-10-27  7:55       ` Christoph Hellwig
2018-10-27  7:55         ` Christoph Hellwig

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