From: Christoph Hellwig <hch@infradead.org>
To: Anup Patel <anup@brainfault.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@sifive.com>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <atish.patra@wdc.com>,
Anup Patel <anup.patel@wdc.com>, Gary Guo <gary@garyguo.net>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH 3/3] riscv: rewrite tlb flush for performance improvement
Date: Fri, 8 Mar 2019 09:18:04 -0800 [thread overview]
Message-ID: <20190308171804.GA27005@infradead.org> (raw)
In-Reply-To: <CAAhSdy3n4F6EE0RYwozH2U2W+WMGJ_eVYs7-ny8Y2szoUeaksQ@mail.gmail.com>
On Fri, Mar 08, 2019 at 10:20:49PM +0530, Anup Patel wrote:
> For your information, the IPI triggering is also done using SBI call
> so we are not saving much by not using SBI calls for remote SFENCE.
Not yet. But all the usual implementation just implement IPIs by
MMIO writes to the CLINT. Which could easily be delegated and we'd
save the trap.
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next prev parent reply other threads:[~2019-03-08 17:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-07 1:29 [PATCH 3/3] riscv: rewrite tlb flush for performance improvement Gary Guo
2019-03-08 14:39 ` Christoph Hellwig
2019-03-08 15:55 ` Gary Guo
2019-03-08 16:31 ` Christoph Hellwig
2019-03-08 16:50 ` Anup Patel
2019-03-08 17:18 ` Christoph Hellwig [this message]
2019-03-10 20:46 ` Anup Patel
2019-03-10 20:49 ` Anup Patel
2019-03-11 15:53 ` Christoph Hellwig
2019-03-11 16:28 ` Anup Patel
2019-03-08 16:46 ` Anup Patel
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