[GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

Hey Uffe,

Here's those missed changes in patch form. I figured it might be a bit
easier this way given the name of the subsystem is in flux, doubly so if
you'd like to put the header change of Rob's on fixes.

I had this out for LKP last night, seemed to get a clean bill of health,
before I rebased it on top of the new name this afternoon, and ofc it was
in linux-next on top of v6.5 for quite a while...

Thanks,
Conor.

CC: arnd@arndb.de
CC: changhuang.liang@starfivetech.com
CC: jiajie.ho@starfivetech.com
CC: linux-pm@vger.kernel.org
CC: linux-riscv@lists.infradead.org
CC: robh@kernel.org
CC: ulf.hansson@linaro.org
CC: walker.chen@starfivetech.com

Changhuang Liang (4):
  dt-bindings: power: Add power-domain header for JH7110
  pmdomain: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
  pmdomain: starfive: Extract JH7110 pmu private operations
  pmdomain: starfive: Add JH7110 AON PMU support

Rob Herring (1):
  pmdomain: starfive: Explicitly include correct DT includes

 MAINTAINERS                                   |   1 +
 drivers/pmdomain/starfive/jh71xx-pmu.c        | 139 ++++++++++++++----
 drivers/soc/starfive/Kconfig                  |   4 +-
 .../dt-bindings/power/starfive,jh7110-pmu.h   |   5 +-
 4 files changed, 117 insertions(+), 32 deletions(-)

-- 
2.39.2


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[GIT PULL 1/5] pmdomain: starfive: Explicitly include correct DT includes

[Conor Dooley]

From: Rob Herring <robh@kernel.org>

The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/pmdomain/starfive/jh71xx-pmu.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c
index 7d5f50d71c0d..d3b78a619d40 100644
--- a/drivers/pmdomain/starfive/jh71xx-pmu.c
+++ b/drivers/pmdomain/starfive/jh71xx-pmu.c
@@ -10,7 +10,6 @@
 #include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/of.h>
-#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
 #include <dt-bindings/power/starfive,jh7110-pmu.h>
-- 
2.39.2


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[GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Conor Dooley]

From: Changhuang Liang <changhuang.liang@starfivetech.com>

Add power-domain header for JH7110 SoC, it can use to operate dphy
power.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 include/dt-bindings/power/starfive,jh7110-pmu.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h
index 132bfe401fc8..341e2a0676ba 100644
--- a/include/dt-bindings/power/starfive,jh7110-pmu.h
+++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
 /*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
  * Author: Walker Chen <walker.chen@starfivetech.com>
  */
 #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
@@ -14,4 +14,7 @@
 #define JH7110_PD_ISP		5
 #define JH7110_PD_VENC		6
 
+#define JH7110_PD_DPHY_TX	0
+#define JH7110_PD_DPHY_RX	1
+
 #endif
-- 
2.39.2


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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Geert Uytterhoeven]

Hi Conor, Changhuang,

On Wed, Sep 13, 2023 at 3:58 PM Conor Dooley <conor@kernel.org> wrote:
> From: Changhuang Liang <changhuang.liang@starfivetech.com>
>
> Add power-domain header for JH7110 SoC, it can use to operate dphy
> power.
>
> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Thanks for your patch, which is now commit 41b66b54a72bd796
("dt-bindings: power: Add power-domain header for JH7110")
in pmdomain/next.

Conor: looks like you forgot to update the patch description, as promised in
https://lore.kernel.org/all/20230519-irk-dwelled-6a499c482e62@spud?

> --- a/include/dt-bindings/power/starfive,jh7110-pmu.h
> +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
> @@ -1,6 +1,6 @@
>  /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>  /*
> - * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
>   * Author: Walker Chen <walker.chen@starfivetech.com>
>   */
>  #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
> @@ -14,4 +14,7 @@
>  #define JH7110_PD_ISP          5
>  #define JH7110_PD_VENC         6
>
> +#define JH7110_PD_DPHY_TX      0
> +#define JH7110_PD_DPHY_RX      1

These values are conflicting with similarly-named values above:

    #define JH7110_PD_SYSTOP        0
    #define JH7110_PD_CPU           1

Upon closer look, and diving into the driver, this header file contains
definitions for two separate number spaces: the first set is meant
to be used in PM Domain specifiers referring to a node compatible
with "starfive,jh7110-pmu", while the second set is meant to be
used in PM Domain specifiers referring to a node compatible with
"starfive,jh7110-aon-syscon".
I think it would be nice to have this reflected in the names of
the defines (e.g. JH7110_PD_AON_DPHY_TX), and/or to add comments
clearly delimiting the two separate number spaces, and explaining
where they apply to.

> +
>  #endif

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 2736 bytes --]

On Tue, Sep 26, 2023 at 12:55:01PM +0200, Geert Uytterhoeven wrote:
> Hi Conor, Changhuang,
> 
> On Wed, Sep 13, 2023 at 3:58 PM Conor Dooley <conor@kernel.org> wrote:
> > From: Changhuang Liang <changhuang.liang@starfivetech.com>
> >
> > Add power-domain header for JH7110 SoC, it can use to operate dphy
> > power.
> >
> > Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for your patch, which is now commit 41b66b54a72bd796
> ("dt-bindings: power: Add power-domain header for JH7110")
> in pmdomain/next.
> 
> Conor: looks like you forgot to update the patch description, as promised in
> https://lore.kernel.org/all/20230519-irk-dwelled-6a499c482e62@spud?

*sigh*, that's what happens when you apply the patches several months
after they were sent I guess. I'll try to make sure that that doesn't
happen again.

> > --- a/include/dt-bindings/power/starfive,jh7110-pmu.h
> > +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
> > @@ -1,6 +1,6 @@
> >  /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> >  /*
> > - * Copyright (C) 2022 StarFive Technology Co., Ltd.
> > + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
> >   * Author: Walker Chen <walker.chen@starfivetech.com>
> >   */
> >  #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
> > @@ -14,4 +14,7 @@
> >  #define JH7110_PD_ISP          5
> >  #define JH7110_PD_VENC         6
> >
> > +#define JH7110_PD_DPHY_TX      0
> > +#define JH7110_PD_DPHY_RX      1
> 
> These values are conflicting with similarly-named values above:
> 
>     #define JH7110_PD_SYSTOP        0
>     #define JH7110_PD_CPU           1
> 
> Upon closer look, and diving into the driver, this header file contains
> definitions for two separate number spaces: the first set is meant
> to be used in PM Domain specifiers referring to a node compatible
> with "starfive,jh7110-pmu", while the second set is meant to be
> used in PM Domain specifiers referring to a node compatible with
> "starfive,jh7110-aon-syscon".

Yeah, apologies for the confusion there. I maybe should have
requested an additional file, since the relevant compatibles
are different.

> I think it would be nice to have this reflected in the names of
> the defines (e.g. JH7110_PD_AON_DPHY_TX), and/or to add comments
> clearly delimiting the two separate number spaces, and explaining
> where they apply to.

Since this is 6.7 material, there's still plenty of time remaining to
make either of these changes. Changhuang Liang, do you think you would
be able to send a patch implementing either of the suggestions made by
Geert?

Thanks,
Conor.


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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Changhuang Liang]

>>>  #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
>>> @@ -14,4 +14,7 @@
>>>  #define JH7110_PD_ISP          5
>>>  #define JH7110_PD_VENC         6
>>>
>>> +#define JH7110_PD_DPHY_TX      0
>>> +#define JH7110_PD_DPHY_RX      1
>>
>> These values are conflicting with similarly-named values above:
>>
>>     #define JH7110_PD_SYSTOP        0
>>     #define JH7110_PD_CPU           1
>>
>> Upon closer look, and diving into the driver, this header file contains
>> definitions for two separate number spaces: the first set is meant
>> to be used in PM Domain specifiers referring to a node compatible
>> with "starfive,jh7110-pmu", while the second set is meant to be
>> used in PM Domain specifiers referring to a node compatible with
>> "starfive,jh7110-aon-syscon".
> 
> Yeah, apologies for the confusion there. I maybe should have
> requested an additional file, since the relevant compatibles
> are different.
> 
>> I think it would be nice to have this reflected in the names of
>> the defines (e.g. JH7110_PD_AON_DPHY_TX), and/or to add comments
>> clearly delimiting the two separate number spaces, and explaining
>> where they apply to.
> 
> Since this is 6.7 material, there's still plenty of time remaining to
> make either of these changes. Changhuang Liang, do you think you would
> be able to send a patch implementing either of the suggestions made by
> Geert?
> 

Hi Conor,

I will send a patch to fix this confusion.

Thanks,
Changhuang

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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Changhuang Liang]

On 2023/9/26 18:55, Geert Uytterhoeven wrote:
> Hi Conor, Changhuang,
> 
> On Wed, Sep 13, 2023 at 3:58 PM Conor Dooley <conor@kernel.org> wrote:
>> From: Changhuang Liang <changhuang.liang@starfivetech.com>
>>
>> Add power-domain header for JH7110 SoC, it can use to operate dphy
>> power.
>>
>> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for your patch, which is now commit 41b66b54a72bd796
> ("dt-bindings: power: Add power-domain header for JH7110")
> in pmdomain/next.
> 

Hi Geert,

Where is the website link for the pmdomain/next?

Thanks,
Changhuang



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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Geert Uytterhoeven]

Hi Changhuang,

On Wed, Sep 27, 2023 at 3:25 AM Changhuang Liang
<changhuang.liang@starfivetech.com> wrote:
> On 2023/9/26 18:55, Geert Uytterhoeven wrote:
> > On Wed, Sep 13, 2023 at 3:58 PM Conor Dooley <conor@kernel.org> wrote:
> >> From: Changhuang Liang <changhuang.liang@starfivetech.com>
> >>
> >> Add power-domain header for JH7110 SoC, it can use to operate dphy
> >> power.
> >>
> >> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
> >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> >
> > Thanks for your patch, which is now commit 41b66b54a72bd796
> > ("dt-bindings: power: Add power-domain header for JH7110")
> > in pmdomain/next.
>
> Where is the website link for the pmdomain/next?

As per https://elixir.bootlin.com/linux/v6.6-rc3/source/MAINTAINERS#L8729
it can be found at
https://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git/log/?h=next

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110

[Changhuang Liang]

On 2023/9/26 18:55, Geert Uytterhoeven wrote:
> Hi Conor, Changhuang,
> 
> On Wed, Sep 13, 2023 at 3:58 PM Conor Dooley <conor@kernel.org> wrote:
>> From: Changhuang Liang <changhuang.liang@starfivetech.com>
>>
>> Add power-domain header for JH7110 SoC, it can use to operate dphy
>> power.
>>
>> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks for your patch, which is now commit 41b66b54a72bd796
> ("dt-bindings: power: Add power-domain header for JH7110")
> in pmdomain/next.
> 
> Conor: looks like you forgot to update the patch description, as promised in
> https://lore.kernel.org/all/20230519-irk-dwelled-6a499c482e62@spud?
> 
>> --- a/include/dt-bindings/power/starfive,jh7110-pmu.h
>> +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
>> @@ -1,6 +1,6 @@
>>  /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>>  /*
>> - * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
>>   * Author: Walker Chen <walker.chen@starfivetech.com>
>>   */
>>  #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
>> @@ -14,4 +14,7 @@
>>  #define JH7110_PD_ISP          5
>>  #define JH7110_PD_VENC         6
>>
>> +#define JH7110_PD_DPHY_TX      0
>> +#define JH7110_PD_DPHY_RX      1
> 
> These values are conflicting with similarly-named values above:
> 
>     #define JH7110_PD_SYSTOP        0
>     #define JH7110_PD_CPU           1
> 
> Upon closer look, and diving into the driver, this header file contains
> definitions for two separate number spaces: the first set is meant
> to be used in PM Domain specifiers referring to a node compatible
> with "starfive,jh7110-pmu", while the second set is meant to be
> used in PM Domain specifiers referring to a node compatible with
> "starfive,jh7110-aon-syscon".
> I think it would be nice to have this reflected in the names of
> the defines (e.g. JH7110_PD_AON_DPHY_TX), and/or to add comments
> clearly delimiting the two separate number spaces, and explaining
> where they apply to.
> 

Hi Geert,

I have sent a series to fix this, but I forget to send it to you.
https://patchwork.kernel.org/project/linux-pm/patch/20230927130734.9921-2-changhuang.liang@starfivetech.com/

Thanks,
Changhuang

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[GIT PULL 3/5] pmdomain: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE

[Conor Dooley]

From: Changhuang Liang <changhuang.liang@starfivetech.com>

Using ARCH_FOO symbol is preferred than SOC_FOO.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/soc/starfive/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/starfive/Kconfig b/drivers/soc/starfive/Kconfig
index bdb96dc4c989..1e9b0c414fec 100644
--- a/drivers/soc/starfive/Kconfig
+++ b/drivers/soc/starfive/Kconfig
@@ -3,8 +3,8 @@
 config JH71XX_PMU
 	bool "Support PMU for StarFive JH71XX Soc"
 	depends on PM
-	depends on SOC_STARFIVE || COMPILE_TEST
-	default SOC_STARFIVE
+	depends on ARCH_STARFIVE || COMPILE_TEST
+	default ARCH_STARFIVE
 	select PM_GENERIC_DOMAINS
 	help
 	  Say 'y' here to enable support power domain support.
-- 
2.39.2


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[GIT PULL 4/5] pmdomain: starfive: Extract JH7110 pmu private operations

[Conor Dooley]

From: Changhuang Liang <changhuang.liang@starfivetech.com>

Move JH7110 private operation into private data of compatible. Convenient
to add AON PMU which would not have interrupts property.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/pmdomain/starfive/jh71xx-pmu.c | 89 ++++++++++++++++++--------
 1 file changed, 62 insertions(+), 27 deletions(-)

diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c
index d3b78a619d40..547cd3b9df11 100644
--- a/drivers/pmdomain/starfive/jh71xx-pmu.c
+++ b/drivers/pmdomain/starfive/jh71xx-pmu.c
@@ -50,9 +50,17 @@ struct jh71xx_domain_info {
 	u8 bit;
 };
 
+struct jh71xx_pmu;
+struct jh71xx_pmu_dev;
+
 struct jh71xx_pmu_match_data {
 	const struct jh71xx_domain_info *domain_info;
 	int num_domains;
+	unsigned int pmu_status;
+	int (*pmu_parse_irq)(struct platform_device *pdev,
+			     struct jh71xx_pmu *pmu);
+	int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd,
+			     u32 mask, bool on);
 };
 
 struct jh71xx_pmu {
@@ -78,12 +86,12 @@ static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool *is_o
 	if (!mask)
 		return -EINVAL;
 
-	*is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask;
+	*is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask;
 
 	return 0;
 }
 
-static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
 {
 	struct jh71xx_pmu *pmu = pmd->pmu;
 	unsigned long flags;
@@ -91,22 +99,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
 	u32 mode;
 	u32 encourage_lo;
 	u32 encourage_hi;
-	bool is_on;
 	int ret;
 
-	ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
-	if (ret) {
-		dev_dbg(pmu->dev, "unable to get current state for %s\n",
-			pmd->genpd.name);
-		return ret;
-	}
-
-	if (is_on == on) {
-		dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
-			pmd->genpd.name, on ? "en" : "dis");
-		return 0;
-	}
-
 	spin_lock_irqsave(&pmu->lock, flags);
 
 	/*
@@ -165,6 +159,29 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
 	return 0;
 }
 
+static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+{
+	struct jh71xx_pmu *pmu = pmd->pmu;
+	const struct jh71xx_pmu_match_data *match_data = pmu->match_data;
+	bool is_on;
+	int ret;
+
+	ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
+	if (ret) {
+		dev_dbg(pmu->dev, "unable to get current state for %s\n",
+			pmd->genpd.name);
+		return ret;
+	}
+
+	if (is_on == on) {
+		dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
+			pmd->genpd.name, on ? "en" : "dis");
+		return 0;
+	}
+
+	return match_data->pmu_set_state(pmd, mask, on);
+}
+
 static int jh71xx_pmu_on(struct generic_pm_domain *genpd)
 {
 	struct jh71xx_pmu_dev *pmd = container_of(genpd,
@@ -225,6 +242,25 @@ static irqreturn_t jh71xx_pmu_interrupt(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu)
+{
+	struct device *dev = &pdev->dev;
+	int ret;
+
+	pmu->irq = platform_get_irq(pdev, 0);
+	if (pmu->irq < 0)
+		return pmu->irq;
+
+	ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
+			       0, pdev->name, pmu);
+	if (ret)
+		dev_err(dev, "failed to request irq\n");
+
+	jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
+
+	return 0;
+}
+
 static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)
 {
 	struct jh71xx_pmu_dev *pmd;
@@ -274,19 +310,18 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
 	if (IS_ERR(pmu->base))
 		return PTR_ERR(pmu->base);
 
-	pmu->irq = platform_get_irq(pdev, 0);
-	if (pmu->irq < 0)
-		return pmu->irq;
-
-	ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
-			       0, pdev->name, pmu);
-	if (ret)
-		dev_err(dev, "failed to request irq\n");
+	spin_lock_init(&pmu->lock);
 
 	match_data = of_device_get_match_data(dev);
 	if (!match_data)
 		return -EINVAL;
 
+	ret = match_data->pmu_parse_irq(pdev, pmu);
+	if (ret) {
+		dev_err(dev, "failed to parse irq\n");
+		return ret;
+	}
+
 	pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
 				  sizeof(struct generic_pm_domain *),
 				  GFP_KERNEL);
@@ -306,9 +341,6 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
 		}
 	}
 
-	spin_lock_init(&pmu->lock);
-	jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
-
 	ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
 	if (ret) {
 		dev_err(dev, "failed to register genpd driver: %d\n", ret);
@@ -356,6 +388,9 @@ static const struct jh71xx_domain_info jh7110_power_domains[] = {
 static const struct jh71xx_pmu_match_data jh7110_pmu = {
 	.num_domains = ARRAY_SIZE(jh7110_power_domains),
 	.domain_info = jh7110_power_domains,
+	.pmu_status = JH71XX_PMU_CURR_POWER_MODE,
+	.pmu_parse_irq = jh7110_pmu_parse_irq,
+	.pmu_set_state = jh7110_pmu_set_state,
 };
 
 static const struct of_device_id jh71xx_pmu_of_match[] = {
-- 
2.39.2


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[GIT PULL 5/5] pmdomain: starfive: Add JH7110 AON PMU support

[Conor Dooley]

From: Changhuang Liang <changhuang.liang@starfivetech.com>

Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the
dphy rx/tx power switch.

Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 MAINTAINERS                            |  1 +
 drivers/pmdomain/starfive/jh71xx-pmu.c | 57 +++++++++++++++++++++++---
 2 files changed, 53 insertions(+), 5 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4d9e7d42412f..f1c34484c9b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20512,6 +20512,7 @@ F:	drivers/usb/cdns3/cdns3-starfive.c
 
 STARFIVE JH71XX PMU CONTROLLER DRIVER
 M:	Walker Chen <walker.chen@starfivetech.com>
+M:	Changhuang Liang <changhuang.liang@starfivetech.com>
 S:	Supported
 F:	Documentation/devicetree/bindings/power/starfive*
 F:	drivers/pmdomain/starfive/jh71xx-pmu.c
diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c
index 547cd3b9df11..2724bee7e85f 100644
--- a/drivers/pmdomain/starfive/jh71xx-pmu.c
+++ b/drivers/pmdomain/starfive/jh71xx-pmu.c
@@ -2,7 +2,7 @@
 /*
  * StarFive JH71XX PMU (Power Management Unit) Controller Driver
  *
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
  */
 
 #include <linux/interrupt.h>
@@ -23,6 +23,9 @@
 #define JH71XX_PMU_EVENT_STATUS		0x88
 #define JH71XX_PMU_INT_STATUS		0x8C
 
+/* aon pmu register offset */
+#define JH71XX_AON_PMU_SWITCH		0x00
+
 /* sw encourage cfg */
 #define JH71XX_PMU_SW_ENCOURAGE_EN_LO	0x05
 #define JH71XX_PMU_SW_ENCOURAGE_EN_HI	0x50
@@ -159,6 +162,26 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
 	return 0;
 }
 
+static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
+{
+	struct jh71xx_pmu *pmu = pmd->pmu;
+	unsigned long flags;
+	u32 val;
+
+	spin_lock_irqsave(&pmu->lock, flags);
+	val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);
+
+	if (on)
+		val |= mask;
+	else
+		val &= ~mask;
+
+	writel(val, pmu->base + JH71XX_AON_PMU_SWITCH);
+	spin_unlock_irqrestore(&pmu->lock, flags);
+
+	return 0;
+}
+
 static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
 {
 	struct jh71xx_pmu *pmu = pmd->pmu;
@@ -316,10 +339,12 @@ static int jh71xx_pmu_probe(struct platform_device *pdev)
 	if (!match_data)
 		return -EINVAL;
 
-	ret = match_data->pmu_parse_irq(pdev, pmu);
-	if (ret) {
-		dev_err(dev, "failed to parse irq\n");
-		return ret;
+	if (match_data->pmu_parse_irq) {
+		ret = match_data->pmu_parse_irq(pdev, pmu);
+		if (ret) {
+			dev_err(dev, "failed to parse irq\n");
+			return ret;
+		}
 	}
 
 	pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
@@ -393,10 +418,31 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = {
 	.pmu_set_state = jh7110_pmu_set_state,
 };
 
+static const struct jh71xx_domain_info jh7110_aon_power_domains[] = {
+	[JH7110_PD_DPHY_TX] = {
+		.name = "DPHY-TX",
+		.bit = 30,
+	},
+	[JH7110_PD_DPHY_RX] = {
+		.name = "DPHY-RX",
+		.bit = 31,
+	},
+};
+
+static const struct jh71xx_pmu_match_data jh7110_aon_pmu = {
+	.num_domains = ARRAY_SIZE(jh7110_aon_power_domains),
+	.domain_info = jh7110_aon_power_domains,
+	.pmu_status = JH71XX_AON_PMU_SWITCH,
+	.pmu_set_state = jh7110_aon_pmu_set_state,
+};
+
 static const struct of_device_id jh71xx_pmu_of_match[] = {
 	{
 		.compatible = "starfive,jh7110-pmu",
 		.data = (void *)&jh7110_pmu,
+	}, {
+		.compatible = "starfive,jh7110-aon-syscon",
+		.data = (void *)&jh7110_aon_pmu,
 	}, {
 		/* sentinel */
 	}
@@ -413,5 +459,6 @@ static struct platform_driver jh71xx_pmu_driver = {
 builtin_platform_driver(jh71xx_pmu_driver);
 
 MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
+MODULE_AUTHOR("Changhuang Liang <changhuang.liang@starfivetech.com>");
 MODULE_DESCRIPTION("StarFive JH71XX PMU Driver");
 MODULE_LICENSE("GPL");
-- 
2.39.2


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Re: [GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[Ulf Hansson]

On Wed, 13 Sept 2023 at 15:56, Conor Dooley <conor@kernel.org> wrote:
>
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Hey Uffe,
>
> Here's those missed changes in patch form. I figured it might be a bit
> easier this way given the name of the subsystem is in flux, doubly so if
> you'd like to put the header change of Rob's on fixes.

Not sure we really need to queue up patch 1 for fixes - or is it
fixing a real problem for us?

>
> I had this out for LKP last night, seemed to get a clean bill of health,
> before I rebased it on top of the new name this afternoon, and ofc it was
> in linux-next on top of v6.5 for quite a while...
>
> Thanks,
> Conor.
>
> CC: arnd@arndb.de
> CC: changhuang.liang@starfivetech.com
> CC: jiajie.ho@starfivetech.com
> CC: linux-pm@vger.kernel.org
> CC: linux-riscv@lists.infradead.org
> CC: robh@kernel.org
> CC: ulf.hansson@linaro.org
> CC: walker.chen@starfivetech.com
>
> Changhuang Liang (4):
>   dt-bindings: power: Add power-domain header for JH7110
>   pmdomain: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
>   pmdomain: starfive: Extract JH7110 pmu private operations
>   pmdomain: starfive: Add JH7110 AON PMU support
>
> Rob Herring (1):
>   pmdomain: starfive: Explicitly include correct DT includes
>
>  MAINTAINERS                                   |   1 +
>  drivers/pmdomain/starfive/jh71xx-pmu.c        | 139 ++++++++++++++----
>  drivers/soc/starfive/Kconfig                  |   4 +-
>  .../dt-bindings/power/starfive,jh7110-pmu.h   |   5 +-
>  4 files changed, 117 insertions(+), 32 deletions(-)
>

The series applied for next, thanks!

Kind regards
Uffe

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Re: [GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 988 bytes --]

Yo,

I tried to reply a few hours ago from k9, but it appears to not have
landed on lore, so here goes attempt #2. Apologies if you got a mail
twice.

On Thu, Sep 14, 2023 at 12:30:20AM +0200, Ulf Hansson wrote:
> On Wed, 13 Sept 2023 at 15:56, Conor Dooley <conor@kernel.org> wrote:
> >
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Hey Uffe,
> >
> > Here's those missed changes in patch form. I figured it might be a bit
> > easier this way given the name of the subsystem is in flux, doubly so if
> > you'd like to put the header change of Rob's on fixes.
> 
> Not sure we really need to queue up patch 1 for fixes - or is it
> fixing a real problem for us?

It was just in case you felt that taking that header cleanup as a fix
was worthwhile. I think I saw some people doing that last cycle & I
think Rob was trying to clean that up for v6.6 which I obviously haven't
helped him with.

> The series applied for next, thanks!

Great, thanks.

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

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Re: [GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[Rob Herring]

On Wed, Sep 13, 2023 at 5:31 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> On Wed, 13 Sept 2023 at 15:56, Conor Dooley <conor@kernel.org> wrote:
> >
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Hey Uffe,
> >
> > Here's those missed changes in patch form. I figured it might be a bit
> > easier this way given the name of the subsystem is in flux, doubly so if
> > you'd like to put the header change of Rob's on fixes.
>
> Not sure we really need to queue up patch 1 for fixes - or is it
> fixing a real problem for us?

It's a dependency to remove some implicit includes, but I still have
more fixes for 6.6 so either is fine.

Rob

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Re: [GIT PULL 0/5] Missed starfive pmdomain changes for v6.6, now for v6.7

[Ulf Hansson]

On Thu, 14 Sept 2023 at 15:57, Rob Herring <robh@kernel.org> wrote:
>
> On Wed, Sep 13, 2023 at 5:31 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> >
> > On Wed, 13 Sept 2023 at 15:56, Conor Dooley <conor@kernel.org> wrote:
> > >
> > > From: Conor Dooley <conor.dooley@microchip.com>
> > >
> > > Hey Uffe,
> > >
> > > Here's those missed changes in patch form. I figured it might be a bit
> > > easier this way given the name of the subsystem is in flux, doubly so if
> > > you'd like to put the header change of Rob's on fixes.
> >
> > Not sure we really need to queue up patch 1 for fixes - or is it
> > fixing a real problem for us?
>
> It's a dependency to remove some implicit includes, but I still have
> more fixes for 6.6 so either is fine.

Okay, I keep it for v6.7 then. Just let me know if things change then
I can move it to v6.6-rcs

Kind regards
Uffe

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