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From: Cyan Yang <cyan.yang@sifive.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, samuel.holland@sifive.com
Cc: linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Cyan Yang <cyan.yang@sifive.com>
Subject: [PATCH 10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension
Date: Fri, 18 Apr 2025 13:32:37 +0800	[thread overview]
Message-ID: <20250418053239.4351-11-cyan.yang@sifive.com> (raw)
In-Reply-To: <20250418053239.4351-1-cyan.yang@sifive.com>

Add SiFive vendor extension "xsfvfwmaccqqq" support to the kernel.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
---
 arch/riscv/include/asm/vendor_extensions/sifive.h | 1 +
 arch/riscv/kernel/vendor_extensions/sifive.c      | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/vendor_extensions/sifive.h b/arch/riscv/include/asm/vendor_extensions/sifive.h
index 2d05e3e73170..ac00e500361c 100644
--- a/arch/riscv/include/asm/vendor_extensions/sifive.h
+++ b/arch/riscv/include/asm/vendor_extensions/sifive.h
@@ -9,6 +9,7 @@
 #define RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD		0
 #define RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ		1
 #define RISCV_ISA_VENDOR_EXT_XSFVFNRCLIPXFQF		2
+#define RISCV_ISA_VENDOR_EXT_XSFVFWMACCQQQ		3
 
 extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_sifive;
 
diff --git a/arch/riscv/kernel/vendor_extensions/sifive.c b/arch/riscv/kernel/vendor_extensions/sifive.c
index 077315e5b2d7..1411337dc1e6 100644
--- a/arch/riscv/kernel/vendor_extensions/sifive.c
+++ b/arch/riscv/kernel/vendor_extensions/sifive.c
@@ -10,6 +10,7 @@
 /* All SiFive vendor extensions supported in Linux */
 const struct riscv_isa_ext_data riscv_isa_vendor_ext_sifive[] = {
 	__RISCV_ISA_EXT_DATA(xsfvfnrclipxfqf, RISCV_ISA_VENDOR_EXT_XSFVFNRCLIPXFQF),
+	__RISCV_ISA_EXT_DATA(xsfvfwmaccqqq, RISCV_ISA_VENDOR_EXT_XSFVFWMACCQQQ),
 	__RISCV_ISA_EXT_DATA(xsfvqmaccdod, RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD),
 	__RISCV_ISA_EXT_DATA(xsfvqmaccqoq, RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ),
 };
-- 
2.39.5 (Apple Git-154)


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  parent reply	other threads:[~2025-04-18  5:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-18  5:32 [PATCH 00/12] riscv: Add vendor extensions support for SiFive Cyan Yang
2025-04-18  5:32 ` [PATCH 01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description Cyan Yang
2025-04-22 15:17   ` Conor Dooley
2025-04-18  5:32 ` [PATCH 02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions Cyan Yang
2025-05-07 13:34   ` kernel test robot
2025-04-18  5:32 ` [PATCH 03/12] riscv: hwprobe: Document " Cyan Yang
2025-04-18  5:32 ` [PATCH 04/12] riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq Cyan Yang
2025-04-18  5:32 ` [PATCH 05/12] dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description Cyan Yang
2025-04-22 15:18   ` Conor Dooley
2025-04-18  5:32 ` [PATCH 06/12] riscv: Add SiFive xsfvfnrclipxfqf vendor extension Cyan Yang
2025-04-18  5:32 ` [PATCH 07/12] riscv: hwprobe: Document " Cyan Yang
2025-04-18  5:32 ` [PATCH 08/12] riscv: hwprobe: Add " Cyan Yang
2025-04-18  5:32 ` [PATCH 09/12] dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description Cyan Yang
2025-04-22 15:18   ` Conor Dooley
2025-04-18  5:32 ` Cyan Yang [this message]
2025-04-18  5:32 ` [PATCH 11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension Cyan Yang
2025-04-18  5:32 ` [PATCH 12/12] riscv: hwprobe: Add " Cyan Yang
2025-05-09 17:30 ` [PATCH 00/12] riscv: Add vendor extensions support for SiFive patchwork-bot+linux-riscv

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