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From: Cyan Yang <cyan.yang@sifive.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, samuel.holland@sifive.com
Cc: linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Cyan Yang <cyan.yang@sifive.com>
Subject: [PATCH 01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description
Date: Fri, 18 Apr 2025 13:32:28 +0800	[thread overview]
Message-ID: <20250418053239.4351-2-cyan.yang@sifive.com> (raw)
In-Reply-To: <20250418053239.4351-1-cyan.yang@sifive.com>

Add "xsfvqmaccdod" and "xsfvqmaccqoq" ISA extensions which are provided by
SiFive for int8 matrix multiplication instructions support.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
---
 .../devicetree/bindings/riscv/extensions.yaml       | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index bcab59e0cc2e..d36e7c68d69a 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -662,6 +662,19 @@ properties:
             Registers in the AX45MP datasheet.
             https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
 
+        # SiFive
+        - const: xsfvqmaccdod
+          description:
+            SiFive Int8 Matrix Multiplication Extensions Specification.
+            See more details in
+            https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
+
+        - const: xsfvqmaccqoq
+          description:
+            SiFive Int8 Matrix Multiplication Extensions Specification.
+            See more details in
+            https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
+
         # T-HEAD
         - const: xtheadvector
           description:
-- 
2.39.5 (Apple Git-154)


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  reply	other threads:[~2025-04-18  5:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-18  5:32 [PATCH 00/12] riscv: Add vendor extensions support for SiFive Cyan Yang
2025-04-18  5:32 ` Cyan Yang [this message]
2025-04-22 15:17   ` [PATCH 01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description Conor Dooley
2025-04-18  5:32 ` [PATCH 02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions Cyan Yang
2025-05-07 13:34   ` kernel test robot
2025-04-18  5:32 ` [PATCH 03/12] riscv: hwprobe: Document " Cyan Yang
2025-04-18  5:32 ` [PATCH 04/12] riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq Cyan Yang
2025-04-18  5:32 ` [PATCH 05/12] dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description Cyan Yang
2025-04-22 15:18   ` Conor Dooley
2025-04-18  5:32 ` [PATCH 06/12] riscv: Add SiFive xsfvfnrclipxfqf vendor extension Cyan Yang
2025-04-18  5:32 ` [PATCH 07/12] riscv: hwprobe: Document " Cyan Yang
2025-04-18  5:32 ` [PATCH 08/12] riscv: hwprobe: Add " Cyan Yang
2025-04-18  5:32 ` [PATCH 09/12] dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description Cyan Yang
2025-04-22 15:18   ` Conor Dooley
2025-04-18  5:32 ` [PATCH 10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension Cyan Yang
2025-04-18  5:32 ` [PATCH 11/12] riscv: hwprobe: Document " Cyan Yang
2025-04-18  5:32 ` [PATCH 12/12] riscv: hwprobe: Add " Cyan Yang
2025-05-09 17:30 ` [PATCH 00/12] riscv: Add vendor extensions support for SiFive patchwork-bot+linux-riscv

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