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From: Inochi Amaoto <inochiama@gmail.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Longbin Li <looong.bin@gmail.com>
Cc: Han Gao <rabenda.cn@gmail.com>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	sophgo@lists.linux.dev, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org, Yixun Lan <dlan@gentoo.org>
Subject: [PATCH 05/11] riscv: dts: sophgo: sg2044: add DMA controller device
Date: Mon,  9 Jun 2025 07:28:29 +0800	[thread overview]
Message-ID: <20250608232836.784737-6-inochiama@gmail.com> (raw)
In-Reply-To: <20250608232836.784737-1-inochiama@gmail.com>

The DMA controller of SG2044 is a standard Synopsys IP, which is
already supported by the kernel.

Add DMA controller DT node for SG2044.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 arch/riscv/boot/dts/sophgo/sg2044.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
index a25cbb78913d..a4d2f8a13cc3 100644
--- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
@@ -31,6 +31,26 @@ soc {
 		#size-cells = <2>;
 		ranges;
 
+		dmac0: dma-controller@7020000000 {
+			compatible = "snps,axi-dma-1.01a";
+			reg = <0x70 0x20000000 0x0 0x10000>;
+			#dma-cells = <1>;
+			clock-names = "core-clk", "cfgr-clk";
+			clocks = <&clk CLK_GATE_SYSDMA_AXI>,
+				 <&clk CLK_GATE_SYSDMA_AXI>;
+			dma-noncoherent;
+			interrupt-parent = <&intc>;
+			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+			dma-channels = <8>;
+			snps,priority = <0 1 2 3 4 5 6 7>;
+			snps,block-size = <4096 4096 4096 4096
+					   4096 4096 4096 4096>;
+			snps,dma-masters = <2>;
+			snps,data-width = <2>;
+			snps,axi-max-burst-len = <4>;
+			status = "disabled";
+		};
+
 		uart0: serial@7030000000 {
 			compatible = "sophgo,sg2044-uart", "snps,dw-apb-uart";
 			reg = <0x70 0x30000000 0x0 0x1000>;
-- 
2.49.0


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  parent reply	other threads:[~2025-06-08 23:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-08 23:28 [PATCH 00/11] riscv: sophgo: sg2044: add DTS support for all available devices Inochi Amaoto
2025-06-08 23:28 ` [PATCH 01/11] riscv: dts: sophgo: sg2044: Add system controller device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 02/11] riscv: dts: sophgo: sg2044: Add clock " Inochi Amaoto
2025-06-08 23:28 ` [PATCH 03/11] riscv: dts: sophgo: sg2044: Add GPIO device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 04/11] riscv: dts: sophgo: sg2044: Add I2C device Inochi Amaoto
2025-06-08 23:28 ` Inochi Amaoto [this message]
2025-06-08 23:28 ` [PATCH 06/11] riscv: dts: sophgo: sg2044: Add MMC controller device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 07/11] riscv: dts: sophgo: sophgo-srd3-10: add HWMON MCU device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 08/11] riscv: dts: sophgo: sg2044: Add ethernet control device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 09/11] riscv: dts: sophgo: sg2044: Add pinctrl device Inochi Amaoto
2025-06-08 23:28 ` [PATCH 10/11] riscv: dts: sophgo: add SG2044 SPI NOR controller driver Inochi Amaoto
2025-06-08 23:28 ` [PATCH 11/11] riscv: dts: sophgo: add pwm controller for SG2044 Inochi Amaoto
2025-06-11  9:53   ` Chen Wang
2025-06-11 10:17     ` Inochi Amaoto
2025-06-17  5:07 ` [PATCH 00/11] riscv: sophgo: sg2044: add DTS support for all available devices Inochi Amaoto

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