* [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac
2025-06-23 0:30 [PATCH net-next RFC v2 0/4] riscv: dts: sophgo: Add ethernet support for cv18xx Inochi Amaoto
@ 2025-06-23 0:30 ` Inochi Amaoto
2025-06-23 6:40 ` Maud Spierings
2025-06-23 0:30 ` [PATCH net-next RFC v2 2/4] riscv: dts: sophgo: Add ethernet device for cv18xx Inochi Amaoto
` (2 subsequent siblings)
3 siblings, 1 reply; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 0:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang
Cc: netdev, devicetree, sophgo, linux-kernel, linux-riscv, Yixun Lan,
Longbin Li, Conor Dooley
The GMAC IP on CV1800 series SoC is a standard Synopsys
DesignWare MAC (version 3.70a).
Add necessary compatible string for this device.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/net/sophgo,cv1800b-dwmac.yaml | 113 ++++++++++++++++++
1 file changed, 113 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
diff --git a/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
new file mode 100644
index 000000000000..2821cca26487
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2044 DWMAC glue layer
+
+maintainers:
+ - Inochi Amaoto <inochiama@gmail.com>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - sophgo,cv1800b-dwmac
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: sophgo,cv1800b-dwmac
+ - const: snps,dwmac-3.70a
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: GMAC main clock
+ - description: PTP clock
+
+ clock-names:
+ items:
+ - const: stmmaceth
+ - const: ptp_ref
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: stmmaceth
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - resets
+ - reset-names
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ ethernet@4070000 {
+ compatible = "sophgo,cv1800b-dwmac", "snps,dwmac-3.70a";
+ reg = <0x04070000 0x10000>;
+ clocks = <&clk 35>, <&clk 36>;
+ clock-names = "stmmaceth", "ptp_ref";
+ interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&rst 12>;
+ reset-names = "stmmaceth";
+ rx-fifo-depth = <8192>;
+ tx-fifo-depth = <8192>;
+ snps,multicast-filter-bins = <0>;
+ snps,perfect-filter-entries = <1>;
+ snps,aal;
+ snps,txpbl = <8>;
+ snps,rxpbl = <8>;
+ snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
+ snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
+ snps,axi-config = <&gmac0_stmmac_axi_setup>;
+ status = "disabled";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ gmac0_mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac0_mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac0_stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <16 8 4 0 0 0 0>;
+ snps,rd_osr_lmt = <2>;
+ snps,wr_osr_lmt = <1>;
+ };
+ };
--
2.50.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac
2025-06-23 0:30 ` [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac Inochi Amaoto
@ 2025-06-23 6:40 ` Maud Spierings
2025-06-23 6:50 ` Inochi Amaoto
0 siblings, 1 reply; 10+ messages in thread
From: Maud Spierings @ 2025-06-23 6:40 UTC (permalink / raw)
To: inochiama
Cc: alex, alexander.sverdlin, andrew+netdev, aou, conor+dt,
conor.dooley, davem, devicetree, dlan, edumazet, huangze, krzk+dt,
kuba, linux-kernel, linux-riscv, looong.bin, netdev, pabeni,
palmer, paul.walmsley, richardcochran, robh, sophgo,
thomas.bonnefille, unicorn_wang, yu.yuan
Inochi sent:> The GMAC IP on CV1800 series SoC is a standard Synopsys
> DesignWare MAC (version 3.70a).
>
> Add necessary compatible string for this device.
>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/net/sophgo,cv1800b-dwmac.yaml | 113 ++++++++++++++++++
> 1 file changed, 113 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
> new file mode 100644
> index 000000000000..2821cca26487
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
> @@ -0,0 +1,113 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo SG2044 DWMAC glue layer
This looks like a copy paste error
kind regards,
Maud
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac
2025-06-23 6:40 ` Maud Spierings
@ 2025-06-23 6:50 ` Inochi Amaoto
0 siblings, 0 replies; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 6:50 UTC (permalink / raw)
To: Maud Spierings, inochiama
Cc: alex, alexander.sverdlin, andrew+netdev, aou, conor+dt,
conor.dooley, davem, devicetree, dlan, edumazet, huangze, krzk+dt,
kuba, linux-kernel, linux-riscv, looong.bin, netdev, pabeni,
palmer, paul.walmsley, richardcochran, robh, sophgo,
thomas.bonnefille, unicorn_wang, yu.yuan
On Mon, Jun 23, 2025 at 08:40:35AM +0200, Maud Spierings wrote:
> Inochi sent:> The GMAC IP on CV1800 series SoC is a standard Synopsys
> > DesignWare MAC (version 3.70a).
> >
> > Add necessary compatible string for this device.
> >
> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > .../bindings/net/sophgo,cv1800b-dwmac.yaml | 113 ++++++++++++++++++
> > 1 file changed, 113 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
> > new file mode 100644
> > index 000000000000..2821cca26487
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/sophgo,cv1800b-dwmac.yaml
> > @@ -0,0 +1,113 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Sophgo SG2044 DWMAC glue layer
>
> This looks like a copy paste error
>
> kind regards,
> Maud
>
Yeah, I will fix this in the next version.
Regards,
Inochi
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH net-next RFC v2 2/4] riscv: dts: sophgo: Add ethernet device for cv18xx
2025-06-23 0:30 [PATCH net-next RFC v2 0/4] riscv: dts: sophgo: Add ethernet support for cv18xx Inochi Amaoto
2025-06-23 0:30 ` [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac Inochi Amaoto
@ 2025-06-23 0:30 ` Inochi Amaoto
2025-06-23 0:30 ` [PATCH net-next RFC v2 3/4] riscv: dts: sophgo: Add mdio multiplexer " Inochi Amaoto
2025-06-23 0:30 ` [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi Inochi Amaoto
3 siblings, 0 replies; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 0:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang
Cc: netdev, devicetree, sophgo, linux-kernel, linux-riscv, Yixun Lan,
Longbin Li
Add ethernet controller device node for cv18xx SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv180x.dtsi | 44 ++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
index e91bb512b099..7eecc67f896e 100644
--- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
@@ -189,6 +189,50 @@ i2c4: i2c@4040000 {
status = "disabled";
};
+ gmac0: ethernet@4070000 {
+ compatible = "sophgo,cv1800b-dwmac", "snps,dwmac-3.70a";
+ reg = <0x04070000 0x10000>;
+ clocks = <&clk CLK_AXI4_ETH0>, <&clk CLK_ETH0_500M>;
+ clock-names = "stmmaceth", "ptp_ref";
+ interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&rst RST_ETH0>;
+ reset-names = "stmmaceth";
+ rx-fifo-depth = <8192>;
+ tx-fifo-depth = <8192>;
+ snps,multicast-filter-bins = <0>;
+ snps,perfect-filter-entries = <1>;
+ snps,aal;
+ snps,txpbl = <8>;
+ snps,rxpbl = <8>;
+ snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
+ snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
+ snps,axi-config = <&gmac0_stmmac_axi_setup>;
+ status = "disabled";
+
+ gmac0_mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ gmac0_mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac0_mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <1>;
+ queue0 {};
+ };
+
+ gmac0_stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <16 8 4 0 0 0 0>;
+ snps,rd_osr_lmt = <2>;
+ snps,wr_osr_lmt = <1>;
+ };
+ };
+
uart0: serial@4140000 {
compatible = "snps,dw-apb-uart";
reg = <0x04140000 0x100>;
--
2.50.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH net-next RFC v2 3/4] riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
2025-06-23 0:30 [PATCH net-next RFC v2 0/4] riscv: dts: sophgo: Add ethernet support for cv18xx Inochi Amaoto
2025-06-23 0:30 ` [PATCH net-next RFC v2 1/4] dt-bindings: net: Add support for Sophgo CV1800 dwmac Inochi Amaoto
2025-06-23 0:30 ` [PATCH net-next RFC v2 2/4] riscv: dts: sophgo: Add ethernet device for cv18xx Inochi Amaoto
@ 2025-06-23 0:30 ` Inochi Amaoto
2025-06-23 7:24 ` Andrew Lunn
2025-06-23 0:30 ` [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi Inochi Amaoto
3 siblings, 1 reply; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 0:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang
Cc: netdev, devicetree, sophgo, linux-kernel, linux-riscv, Yixun Lan,
Longbin Li
Add DT device node of mdio multiplexer device for cv18xx SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv180x.dtsi | 27 ++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
index 7eecc67f896e..01deb27a95b6 100644
--- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
@@ -31,6 +31,33 @@ rst: reset-controller@3003000 {
#reset-cells = <1>;
};
+ mdio: mdio@3009800 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ reg = <0x3009800 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&gmac0_mdio>;
+ mux-mask = <0x80>;
+ status = "disabled";
+
+ internal_mdio: mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ internal_ephy: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+
+ external_mdio: mdio@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x80>;
+ };
+ };
+
gpio0: gpio@3020000 {
compatible = "snps,dw-apb-gpio";
reg = <0x3020000 0x1000>;
--
2.50.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH net-next RFC v2 3/4] riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
2025-06-23 0:30 ` [PATCH net-next RFC v2 3/4] riscv: dts: sophgo: Add mdio multiplexer " Inochi Amaoto
@ 2025-06-23 7:24 ` Andrew Lunn
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Lunn @ 2025-06-23 7:24 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang, netdev, devicetree, sophgo,
linux-kernel, linux-riscv, Yixun Lan, Longbin Li
> + external_mdio: mdio@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x80>;
Since reg is 0x80, the normal convention is this is mdio@80.
Andrew
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi
2025-06-23 0:30 [PATCH net-next RFC v2 0/4] riscv: dts: sophgo: Add ethernet support for cv18xx Inochi Amaoto
` (2 preceding siblings ...)
2025-06-23 0:30 ` [PATCH net-next RFC v2 3/4] riscv: dts: sophgo: Add mdio multiplexer " Inochi Amaoto
@ 2025-06-23 0:30 ` Inochi Amaoto
2025-06-23 7:26 ` Andrew Lunn
3 siblings, 1 reply; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 0:30 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Inochi Amaoto, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang
Cc: netdev, devicetree, sophgo, linux-kernel, linux-riscv, Yixun Lan,
Longbin Li
Add configuration for ethernet controller on Huashan Pi.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
index 26b57e15adc1..86f76159c304 100644
--- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
@@ -55,6 +55,16 @@ &emmc {
non-removable;
};
+&gmac0 {
+ status = "okay";
+ phy-handle = <&internal_ephy>;
+ phy-mode = "internal";
+};
+
+&mdio {
+ status = "okay";
+};
+
&sdhci0 {
status = "okay";
bus-width = <4>;
--
2.50.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi
2025-06-23 0:30 ` [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi Inochi Amaoto
@ 2025-06-23 7:26 ` Andrew Lunn
2025-06-23 21:59 ` Inochi Amaoto
0 siblings, 1 reply; 10+ messages in thread
From: Andrew Lunn @ 2025-06-23 7:26 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang, netdev, devicetree, sophgo,
linux-kernel, linux-riscv, Yixun Lan, Longbin Li
On Mon, Jun 23, 2025 at 08:30:46AM +0800, Inochi Amaoto wrote:
> Add configuration for ethernet controller on Huashan Pi.
>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
> arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> index 26b57e15adc1..86f76159c304 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> +++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> @@ -55,6 +55,16 @@ &emmc {
> non-removable;
> };
>
> +&gmac0 {
> + status = "okay";
> + phy-handle = <&internal_ephy>;
> + phy-mode = "internal";
> +};
Since the PHY is internal, it should be part of the SoC .dtsi file,
same as any other peripheral. The board .dts file can then enable it.
Andrew
---
pw-bot: cr
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH net-next RFC v2 4/4] riscv: dts: sophgo: Add ethernet configuration for Huashan Pi
2025-06-23 7:26 ` Andrew Lunn
@ 2025-06-23 21:59 ` Inochi Amaoto
0 siblings, 0 replies; 10+ messages in thread
From: Inochi Amaoto @ 2025-06-23 21:59 UTC (permalink / raw)
To: Andrew Lunn, Inochi Amaoto
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen Wang, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Richard Cochran, Alexander Sverdlin,
Thomas Bonnefille, Yu Yuan, Ze Huang, netdev, devicetree, sophgo,
linux-kernel, linux-riscv, Yixun Lan, Longbin Li
On Mon, Jun 23, 2025 at 09:26:43AM +0200, Andrew Lunn wrote:
> On Mon, Jun 23, 2025 at 08:30:46AM +0800, Inochi Amaoto wrote:
> > Add configuration for ethernet controller on Huashan Pi.
> >
> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > ---
> > arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> > index 26b57e15adc1..86f76159c304 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> > +++ b/arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts
> > @@ -55,6 +55,16 @@ &emmc {
> > non-removable;
> > };
> >
> > +&gmac0 {
> > + status = "okay";
> > + phy-handle = <&internal_ephy>;
> > + phy-mode = "internal";
> > +};
>
> Since the PHY is internal, it should be part of the SoC .dtsi file,
> same as any other peripheral. The board .dts file can then enable it.
>
Does this mean only boards using external phy need to override the
"phy-handle" and "phy-mode"?
Regards,
Inochi
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