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From: guoren@kernel.org
To: palmer@dabbelt.com, guoren@kernel.org, conor@kernel.org,
	alexghiti@rivosinc.com, paul.walmsley@sifive.com,
	bjorn@rivosinc.com, eobras@redhat.com, corbet@lwn.net,
	peterlin@andestech.com, rabenda.cn@gmail.com
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 1/2] riscv: Move vendor errata definitions to new header
Date: Sun, 13 Jul 2025 11:53:20 -0400	[thread overview]
Message-ID: <20250713155321.2064856-2-guoren@kernel.org> (raw)
In-Reply-To: <20250713155321.2064856-1-guoren@kernel.org>

From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

Move vendor errata definitions into errata_list_vendors.h.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
 arch/riscv/include/asm/errata_list.h         | 19 +---------------
 arch/riscv/include/asm/errata_list_vendors.h | 24 ++++++++++++++++++++
 2 files changed, 25 insertions(+), 18 deletions(-)
 create mode 100644 arch/riscv/include/asm/errata_list_vendors.h

diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index 6e426ed7919a..18c9f7ee9b7c 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -10,24 +10,7 @@
 #include <asm/insn-def.h>
 #include <asm/hwcap.h>
 #include <asm/vendorid_list.h>
-
-#ifdef CONFIG_ERRATA_ANDES
-#define ERRATA_ANDES_NO_IOCP 0
-#define ERRATA_ANDES_NUMBER 1
-#endif
-
-#ifdef CONFIG_ERRATA_SIFIVE
-#define	ERRATA_SIFIVE_CIP_453 0
-#define	ERRATA_SIFIVE_CIP_1200 1
-#define	ERRATA_SIFIVE_NUMBER 2
-#endif
-
-#ifdef CONFIG_ERRATA_THEAD
-#define	ERRATA_THEAD_MAE 0
-#define	ERRATA_THEAD_PMU 1
-#define	ERRATA_THEAD_GHOSTWRITE 2
-#define	ERRATA_THEAD_NUMBER 3
-#endif
+#include <asm/errata_list_vendors.h>
 
 #ifdef __ASSEMBLY__
 
diff --git a/arch/riscv/include/asm/errata_list_vendors.h b/arch/riscv/include/asm/errata_list_vendors.h
new file mode 100644
index 000000000000..a37d1558f39f
--- /dev/null
+++ b/arch/riscv/include/asm/errata_list_vendors.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef ASM_ERRATA_LIST_VENDORS_H
+#define ASM_ERRATA_LIST_VENDORS_H
+
+#ifdef CONFIG_ERRATA_ANDES
+#define ERRATA_ANDES_NO_IOCP 0
+#define ERRATA_ANDES_NUMBER 1
+#endif
+
+#ifdef CONFIG_ERRATA_SIFIVE
+#define	ERRATA_SIFIVE_CIP_453 0
+#define	ERRATA_SIFIVE_CIP_1200 1
+#define	ERRATA_SIFIVE_NUMBER 2
+#endif
+
+#ifdef CONFIG_ERRATA_THEAD
+#define	ERRATA_THEAD_MAE 0
+#define	ERRATA_THEAD_PMU 1
+#define	ERRATA_THEAD_GHOSTWRITE 2
+#define	ERRATA_THEAD_NUMBER 3
+#endif
+
+#endif
-- 
2.40.1


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  reply	other threads:[~2025-07-13 15:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-13 15:53 [PATCH V2 0/2] riscv: errata: Add ERRATA_THEAD_WRITE_ONCE fixup guoren
2025-07-13 15:53 ` guoren [this message]
2025-07-15 13:13   ` [PATCH V2 1/2] riscv: Move vendor errata definitions to new header Han Gao
2025-07-17  8:21   ` Alexandre Ghiti
2025-07-13 15:53 ` [PATCH V2 2/2] riscv: errata: Add ERRATA_THEAD_WRITE_ONCE fixup guoren
2025-07-15  3:02   ` Drew Fustini
2025-07-15  6:14     ` Guo Ren
2025-07-15 13:14   ` Han Gao
2025-07-17  8:22   ` Alexandre Ghiti
2025-10-07 21:36     ` Han Gao
2025-10-09  7:29       ` Alexandre Ghiti
2025-10-15  3:37         ` Paul Walmsley
2025-10-15  7:53           ` Guo Ren
2025-12-12 16:37           ` Han Gao
2026-01-15 11:10           ` Yao Zi
2025-08-06 17:15 ` [PATCH V2 0/2] " patchwork-bot+linux-riscv

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