[PATCH v2 0/4] riscv: minor thread_info.cpu improvements

[PATCH v2 0/4] riscv: minor thread_info.cpu improvements

[Radim Krčmář]

Hello,

I noticed that we give thread_info.cpu two different names in the
assembly, load it as a wider type, and store it suboptimally.

v2 is split for easy backporting.

Thanks.

v2:
* transform [v1 2/3] into [v2 1-2/4] to simplify backports [Alex]
* tested and reviewed by Alex
v1: https://lore.kernel.org/lkml/20250722160556.2216925-2-rkrcmar@ventanamicro.com/

Radim Krčmář (4):
  riscv: use lw when reading int cpu in new_vmalloc_check
  riscv: use lw when reading int cpu in asm_per_cpu
  riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM
  riscv: pack rv64 thread_info better

 arch/riscv/include/asm/asm.h         | 2 +-
 arch/riscv/include/asm/thread_info.h | 2 +-
 arch/riscv/kernel/asm-offsets.c      | 1 -
 arch/riscv/kernel/entry.S            | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

-- 
2.50.0


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[PATCH v2 1/4] riscv: use lw when reading int cpu in new_vmalloc_check

[Radim Krčmář]

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: 503638e0babf ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Cc: <stable@vger.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/kernel/entry.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 75656afa2d6b..4fdf187a62bf 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -46,7 +46,7 @@
 	 * a0 = &new_vmalloc[BIT_WORD(cpu)]
 	 * a1 = BIT_MASK(cpu)
 	 */
-	REG_L 	a2, TASK_TI_CPU(tp)
+	lw	a2, TASK_TI_CPU(tp)
 	/*
 	 * Compute the new_vmalloc element position:
 	 * (cpu / 64) * 8 = (cpu >> 6) << 3
-- 
2.50.0


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[PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per_cpu

[Radim Krčmář]

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: <stable@vger.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/include/asm/asm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index a8a2af6dfe9d..2a16e88e13de 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-	REG_L \tmp, TASK_TI_CPU_NUM(tp)
+	lw    \tmp, TASK_TI_CPU_NUM(tp)
 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
 	la    \dst, __per_cpu_offset
 	add   \dst, \dst, \tmp
-- 
2.50.0


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[PATCH v2 3/4] riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM

[Radim Krčmář]

The offsets of TASK_TI_CPU and TASK_TI_CPU_NUM are identical, and
TASK_TI_CPU is a better name for thread_info.cpu.

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: moved after patches for stable [Alex]
---
 arch/riscv/include/asm/asm.h    | 2 +-
 arch/riscv/kernel/asm-offsets.c | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 2a16e88e13de..93b1e4ce34d1 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-	lw    \tmp, TASK_TI_CPU_NUM(tp)
+	lw    \tmp, TASK_TI_CPU(tp)
 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
 	la    \dst, __per_cpu_offset
 	add   \dst, \dst, \tmp
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index 6e8c0d6feae9..49cf2c347485 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -49,7 +49,6 @@ void asm_offsets(void)
 	OFFSET(TASK_TI_A2, task_struct, thread_info.a2);
 #endif
 
-	OFFSET(TASK_TI_CPU_NUM, task_struct, thread_info.cpu);
 	OFFSET(TASK_THREAD_F0,  task_struct, thread.fstate.f[0]);
 	OFFSET(TASK_THREAD_F1,  task_struct, thread.fstate.f[1]);
 	OFFSET(TASK_THREAD_F2,  task_struct, thread.fstate.f[2]);
-- 
2.50.0


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[PATCH v2 4/4] riscv: pack rv64 thread_info better

[Radim Krčmář]

On rv64, preempt_count and cpu were both 32-bit followed by 64-bit, so
placing one in the hole saves 8 bytes in the struct.

Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
---
v2: tested and reviewed by Alex
---
 arch/riscv/include/asm/thread_info.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index f5916a70879a..c267d6bd838e 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -53,6 +53,7 @@
 struct thread_info {
 	unsigned long		flags;		/* low level flags */
 	int                     preempt_count;  /* 0=>preemptible, <0=>BUG */
+	int			cpu;
 	/*
 	 * These stack pointers are overwritten on every system call or
 	 * exception.  SP is also saved to the stack it can be recovered when
@@ -60,7 +61,6 @@ struct thread_info {
 	 */
 	long			kernel_sp;	/* Kernel stack pointer */
 	long			user_sp;	/* User stack pointer */
-	int			cpu;
 	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
 #ifdef CONFIG_SHADOW_CALL_STACK
 	void			*scs_base;
-- 
2.50.0


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Re: [PATCH v2 0/4] riscv: minor thread_info.cpu improvements

[Alexandre Ghiti]

Hi Radim,

On 7/25/25 18:54, Radim Krčmář wrote:
> Hello,
>
> I noticed that we give thread_info.cpu two different names in the
> assembly, load it as a wider type, and store it suboptimally.
>
> v2 is split for easy backporting.
>
> Thanks.
>
> v2:
> * transform [v1 2/3] into [v2 1-2/4] to simplify backports [Alex]
> * tested and reviewed by Alex
> v1: https://lore.kernel.org/lkml/20250722160556.2216925-2-rkrcmar@ventanamicro.com/
>
> Radim Krčmář (4):
>    riscv: use lw when reading int cpu in new_vmalloc_check
>    riscv: use lw when reading int cpu in asm_per_cpu
>    riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM
>    riscv: pack rv64 thread_info better
>
>   arch/riscv/include/asm/asm.h         | 2 +-
>   arch/riscv/include/asm/thread_info.h | 2 +-
>   arch/riscv/kernel/asm-offsets.c      | 1 -
>   arch/riscv/kernel/entry.S            | 2 +-
>   4 files changed, 3 insertions(+), 4 deletions(-)
>

Thanks for the quick respin, I'll take that for 6.17.

Thanks,

Alex


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Re: [PATCH v2 0/4] riscv: minor thread_info.cpu improvements

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:

On Fri, 25 Jul 2025 18:54:08 +0200 you wrote:
> Hello,
> 
> I noticed that we give thread_info.cpu two different names in the
> assembly, load it as a wider type, and store it suboptimally.
> 
> v2 is split for easy backporting.
> 
> [...]

Here is the summary with links:
  - [v2,1/4] riscv: use lw when reading int cpu in new_vmalloc_check
    https://git.kernel.org/riscv/c/5fcea028d8b8
  - [v2,2/4] riscv: use lw when reading int cpu in asm_per_cpu
    https://git.kernel.org/riscv/c/47e006cf9789
  - [v2,3/4] riscv: use TASK_TI_CPU instead of TASK_TI_CPU_NUM
    https://git.kernel.org/riscv/c/a1984b2541b0
  - [v2,4/4] riscv: pack rv64 thread_info better
    https://git.kernel.org/riscv/c/9b3a86b7b14c

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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