From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Paul Walmsley <pjw@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Bartosz Golaszewski <brgl@kernel.org>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v2 18/22] dt-bindings: pinctrl: Add starfive,jhb100-per2pok-pinctrl
Date: Thu, 14 May 2026 04:12:14 -0700 [thread overview]
Message-ID: <20260514111218.94519-19-changhuang.liang@starfivetech.com> (raw)
In-Reply-To: <20260514111218.94519-1-changhuang.liang@starfivetech.com>
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-2 Power OK
(per2pok) pinctrl controller.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
.../starfive,jhb100-per2pok-pinctrl.yaml | 173 ++++++++++++++++++
.../pinctrl/starfive,jhb100-pinctrl.h | 20 ++
2 files changed, 193 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml
new file mode 100644
index 000000000000..7ffebf6b1bcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml
@@ -0,0 +1,173 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JHB100 Peripheral-2 Power OK Pin Controller
+
+description: |
+ Pinctrl bindings for JHB100 RISC-V SoC from StarFive Technology Ltd.
+
+ The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
+ per2, per2pok, per3, adc0, adc1, emmc, and vga.
+ This document provides an overview of the "bper2pok" pinctrl domain.
+
+ The "per2pok" domain has a pin controller which provides
+ - function selection for GPIO pads.
+ - GPIO interrupt handling.
+
+ In the Peripheral-2 Power OK Pin Controller, there are 18 multi-function
+ GPIO_PADs. Each can be multiplexed to several peripherals through function
+ selection. Each iopad has a maximum of up to 4 functions - 0, 1, 2, and 3.
+ Function 0 is the default function or generally the GPIO function.
+ Function 1, 2, and 3 are alternate functions or peripheral signals that can
+ routed to an iopad. The function selection can be carried out by writing
+ the function number to the iopad function select register.
+
+ Each iopad is configurable with parameters such as input-enable, internal
+ pull-up/pull-down bias, drive strength, schmitt trigger, slew rate, input
+ debounce nanoseconds, power source and drive type (open-drain or push-pull).
+
+maintainers:
+ - Alex Soo <yuklin.soo@starfivetech.com>
+
+properties:
+ compatible:
+ items:
+ - const: starfive,jhb100-per2pok-pinctrl
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 3
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 3
+
+ gpio-ranges: true
+
+ gpio-line-names: true
+
+patternProperties:
+ '-grp$':
+ type: object
+ additionalProperties: false
+ patternProperties:
+ '-pins$':
+ type: object
+ description: |
+ A pinctrl node should contain at least one subnode representing the
+ pinctrl groups available in the domain. Each subnode will list the
+ pins it needs, and how they should be configured, with regard to
+ function selection, bias, input enable/disable, input schmitt
+ trigger enable/disable, slew-rate, input debounce nanoseconds,
+ drive-open-drain, drive-push-pull, power-source and drive-strength.
+ allOf:
+ - $ref: /schemas/pinctrl/pincfg-node.yaml
+ - $ref: /schemas/pinctrl/pinmux-node.yaml
+ unevaluatedProperties: false
+
+ properties:
+ pins:
+ description:
+ The list of IOs that properties in the pincfg node apply to.
+
+ function:
+ description:
+ A string containing the name of the function to mux for these
+ pins.
+ enum: [ can, gpio, host0_port80, host1_port80, passthru, pwm ]
+
+ bias-disable: true
+
+ bias-pull-down:
+ type: boolean
+
+ bias-pull-up:
+ oneOf:
+ - type: boolean
+ - enum: [ 600, 900, 1200, 2000 ]
+ description: Pull up RSEL type resistance values (in ohms)
+ description:
+ For normal pull up type there is no need to specify a resistance
+ value, hence this can be specified as a boolean property.
+ For RSEL pull up type a resistance value (in ohms) can be added.
+
+ drive-open-drain: true
+
+ drive-push-pull: true
+
+ drive-strength:
+ enum: [ 2, 4, 8, 12 ]
+
+ drive-strength-microamp:
+ enum: [ 2000, 4000, 8000, 12000 ]
+
+ input-debounce-nanoseconds:
+ minimum: 0
+ maximum: 4294967295
+
+ input-disable: true
+
+ input-enable: true
+
+ input-schmitt-enable: true
+
+ input-schmitt-disable: true
+
+ power-source:
+ enum: [ 0, 1, 2 ]
+
+ slew-rate:
+ enum: [ 0, 1 ]
+ default: 0
+ description: |
+ 0: slow (half frequency)
+ 1: fast
+
+required:
+ - compatible
+ - reg
+ - resets
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+ - gpio-controller
+ - '#gpio-cells'
+ - gpio-ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pinctrl_per2pok: pinctrl@11bc2400 {
+ compatible = "starfive,jhb100-per2pok-pinctrl";
+ reg = <0x0 0x11bc2400 0x0 0x400>;
+ resets = <&per2crg 1>;
+ interrupts = <63>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ gpio-controller;
+ #gpio-cells = <3>;
+ gpio-ranges = <&pinctrl_per2pok 0 0 0 18>;
+ };
+ };
diff --git a/include/dt-bindings/pinctrl/starfive,jhb100-pinctrl.h b/include/dt-bindings/pinctrl/starfive,jhb100-pinctrl.h
index 6a80c56304e8..5573b5b0420b 100644
--- a/include/dt-bindings/pinctrl/starfive,jhb100-pinctrl.h
+++ b/include/dt-bindings/pinctrl/starfive,jhb100-pinctrl.h
@@ -210,6 +210,26 @@
#define PADNUM_PER2_GPIO_D29 29
#define PADNUM_PER2_GPIO_D30 30
+/* per2pok pad numbers */
+#define PADNUM_PER2POK_GPIO_D31 0
+#define PADNUM_PER2POK_GPIO_D32 1
+#define PADNUM_PER2POK_GPIO_D33 2
+#define PADNUM_PER2POK_GPIO_D34 3
+#define PADNUM_PER2POK_GPIO_D35 4
+#define PADNUM_PER2POK_GPIO_D36 5
+#define PADNUM_PER2POK_GPIO_D37 6
+#define PADNUM_PER2POK_GPIO_D38 7
+#define PADNUM_PER2POK_GPIO_D39 8
+#define PADNUM_PER2POK_GPIO_D40 9
+#define PADNUM_PER2POK_GPIO_D41 10
+#define PADNUM_PER2POK_GPIO_D42 11
+#define PADNUM_PER2POK_GPIO_D43 12
+#define PADNUM_PER2POK_GPIO_D44 13
+#define PADNUM_PER2POK_GPIO_D45 14
+#define PADNUM_PER2POK_GPIO_D46 15
+#define PADNUM_PER2POK_GPIO_D47 16
+#define PADNUM_PER2POK_GPIO_D48 17
+
/* pinctrl hog power-source value */
#define JHB100_PINVREF_3_3V 0
#define JHB100_PINVREF_2_5V 1
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-05-14 11:13 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-14 11:11 [PATCH v2 00/22] Add basic pinctrl drivers for JHB100 SoC Changhuang Liang
2026-05-14 11:11 ` [PATCH v2 01/22] dt-bindings: pincfg-node: Add property 'input-debounce-nanoseconds' Changhuang Liang
2026-05-14 18:35 ` Conor Dooley
2026-05-14 11:11 ` [PATCH v2 02/22] pinctrl: pinconf-generic: " Changhuang Liang
2026-05-14 11:11 ` [PATCH v2 03/22] pinctrl: pinctrl-generic: Make the "function" property optional Changhuang Liang
2026-05-14 18:46 ` Conor Dooley
2026-05-15 5:55 ` Changhuang Liang
2026-05-15 7:38 ` Conor Dooley
2026-05-15 8:23 ` Changhuang Liang
2026-05-15 9:47 ` Conor Dooley
2026-05-15 10:30 ` Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 04/22] dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl Changhuang Liang
2026-05-14 18:52 ` Conor Dooley
2026-05-15 6:10 ` Changhuang Liang
2026-05-15 7:22 ` Conor Dooley
2026-05-15 8:53 ` Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 05/22] pinctrl: starfive: Add StarFive JHB100 sys0 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 06/22] dt-bindings: pinctrl: Add starfive,jhb100-sys0h-pinctrl Changhuang Liang
2026-05-14 13:17 ` Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 07/22] pinctrl: starfive: Add StarFive JHB100 sys0h controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 08/22] dt-bindings: pinctrl: Add starfive,jhb100-sys1-pinctrl Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 09/22] pinctrl: starfive: Add StarFive JHB100 sys1 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 10/22] dt-bindings: pinctrl: Add starfive,jhb100-sys2-pinctrl Changhuang Liang
2026-05-14 13:17 ` Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 11/22] pinctrl: starfive: Add StarFive JHB100 sys2 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 12/22] dt-bindings: pinctrl: Add starfive,jhb100-per0-pinctrl Changhuang Liang
2026-05-14 13:17 ` Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 13/22] pinctrl: starfive: Add StarFive JHB100 per0 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 14/22] dt-bindings: pinctrl: Add starfive,jhb100-per1-pinctrl Changhuang Liang
2026-05-14 13:17 ` Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 15/22] pinctrl: starfive: Add StarFive JHB100 per1 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 16/22] dt-bindings: pinctrl: Add starfive,jhb100-per2-pinctrl Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 17/22] pinctrl: starfive: Add StarFive JHB100 per2 controller driver Changhuang Liang
2026-05-14 11:12 ` Changhuang Liang [this message]
2026-05-14 13:17 ` [PATCH v2 18/22] dt-bindings: pinctrl: Add starfive,jhb100-per2pok-pinctrl Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 19/22] pinctrl: starfive: Add StarFive JHB100 per2pok controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 20/22] dt-bindings: pinctrl: Add starfive,jhb100-per3-pinctrl Changhuang Liang
2026-05-14 13:17 ` Rob Herring (Arm)
2026-05-14 11:12 ` [PATCH v2 21/22] pinctrl: starfive: Add StarFive JHB100 per3 controller driver Changhuang Liang
2026-05-14 11:12 ` [PATCH v2 22/22] riscv: dts: starfive: jhb100: Add pinctrl nodes Changhuang Liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260514111218.94519-19-changhuang.liang@starfivetech.com \
--to=changhuang.liang@starfivetech.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=brgl@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kernel@esmil.dk \
--cc=krzk+dt@kernel.org \
--cc=lianfeng.ouyang@starfivetech.com \
--cc=linusw@kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=pjw@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox