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* [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently
@ 2026-08-16  7:00 Guo Ren
  2026-08-16  7:00 ` [PATCH 1/5] riscv: smp: Move enum ipi_message_type to asm/smp.h Guo Ren
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

This series removes the implicit assumption that RISC-V supports exactly
eight IPI message types.

Currently, the SBI, CLINT and ACLINT SSWI IPI providers use
BITS_PER_BYTE when sizing the generic IPI mux, while IMSIC carries a
separate IMSIC_NR_IPI definition set to 8. These values happen to match
IPI_MAX today, but neither is the proper source of truth for the number
of RISC-V IPI message types.

Move enum ipi_message_type to asm/smp.h so IPI providers can use IPI_MAX
directly, then replace the BITS_PER_BYTE and IMSIC_NR_IPI uses with
IPI_MAX.

This also makes adding future RISC-V IPI message types independent of
the current eight-entry assumption.

GUO Ren (XuanTie) (5):
  riscv: smp: Move enum ipi_message_type to asm/smp.h
  riscv: sbi: Use IPI_MAX for SBI IPI muxing
  clocksource: clint: Use IPI_MAX for IPI muxing
  irqchip/aclint-sswi: Use IPI_MAX for IPI muxing
  irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI

 arch/riscv/include/asm/smp.h            | 12 ++++++++++++
 arch/riscv/kernel/sbi-ipi.c             |  4 ++--
 arch/riscv/kernel/smp.c                 | 12 ------------
 drivers/clocksource/timer-clint.c       |  4 ++--
 drivers/irqchip/irq-aclint-sswi.c       |  4 ++--
 drivers/irqchip/irq-riscv-imsic-early.c |  4 ++--
 drivers/irqchip/irq-riscv-imsic-state.h |  1 -
 7 files changed, 20 insertions(+), 21 deletions(-)

-- 
2.43.0


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^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/5] riscv: smp: Move enum ipi_message_type to asm/smp.h
  2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
@ 2026-08-16  7:00 ` Guo Ren
  2026-08-16  7:00 ` [PATCH 2/5] riscv: sbi: Use IPI_MAX for SBI IPI muxing Guo Ren
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

The IPI message type enumeration (and therefore IPI_MAX) is currently
private to arch/riscv/kernel/smp.c.  Several IPI providers need to know
the exact number of IPIs that the architecture requires, so move the
enum into the public header.

This is a pure code movement with no functional change.

Signed-off-by: GUO Ren (XuanTie) <guoren@kernel.org>
---
 arch/riscv/include/asm/smp.h | 12 ++++++++++++
 arch/riscv/kernel/smp.c      | 12 ------------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 0ecc67641b09..bed39fff1f8a 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -15,6 +15,18 @@
 struct seq_file;
 extern unsigned long boot_cpu_hartid;
 
+enum ipi_message_type {
+	IPI_RESCHEDULE,
+	IPI_CALL_FUNC,
+	IPI_CPU_STOP,
+	IPI_CPU_CRASH_STOP,
+	IPI_IRQ_WORK,
+	IPI_TIMER,
+	IPI_CPU_BACKTRACE,
+	IPI_KGDB_ROUNDUP,
+	IPI_MAX
+};
+
 #ifdef CONFIG_SMP
 
 #include <linux/jump_label.h>
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index fa66f9c97d74..8930b62b15e7 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -28,18 +28,6 @@
 #include <asm/cacheflush.h>
 #include <asm/cpu_ops.h>
 
-enum ipi_message_type {
-	IPI_RESCHEDULE,
-	IPI_CALL_FUNC,
-	IPI_CPU_STOP,
-	IPI_CPU_CRASH_STOP,
-	IPI_IRQ_WORK,
-	IPI_TIMER,
-	IPI_CPU_BACKTRACE,
-	IPI_KGDB_ROUNDUP,
-	IPI_MAX
-};
-
 static const char * const ipi_names[] = {
 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
 	[IPI_CALL_FUNC]		= "Function call interrupts",
-- 
2.43.0


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^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/5] riscv: sbi: Use IPI_MAX for SBI IPI muxing
  2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
  2026-08-16  7:00 ` [PATCH 1/5] riscv: smp: Move enum ipi_message_type to asm/smp.h Guo Ren
@ 2026-08-16  7:00 ` Guo Ren
  2026-08-16  7:00 ` [PATCH 3/5] clocksource: clint: Use IPI_MAX for " Guo Ren
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

Now that IPI_MAX is visible from <asm/smp.h>, replace the hard-coded
BITS_PER_BYTE with the proper symbolic constant in the SBI IPI
extension driver.

No functional change; IPI_MAX is still 8.

Signed-off-by: GUO Ren (XuanTie) <guoren@kernel.org>
---
 arch/riscv/kernel/sbi-ipi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/kernel/sbi-ipi.c b/arch/riscv/kernel/sbi-ipi.c
index 0cc5559c08d8..eeec178a9b95 100644
--- a/arch/riscv/kernel/sbi-ipi.c
+++ b/arch/riscv/kernel/sbi-ipi.c
@@ -57,7 +57,7 @@ void __init sbi_ipi_init(void)
 		return;
 	}
 
-	virq = ipi_mux_create(BITS_PER_BYTE, sbi_send_ipi);
+	virq = ipi_mux_create(IPI_MAX, sbi_send_ipi);
 	if (virq <= 0) {
 		pr_err("unable to create muxed IPIs\n");
 		irq_dispose_mapping(sbi_ipi_virq);
@@ -75,7 +75,7 @@ void __init sbi_ipi_init(void)
 			  "irqchip/sbi-ipi:starting",
 			  sbi_ipi_starting_cpu, NULL);
 
-	riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
+	riscv_ipi_set_virq_range(virq, IPI_MAX);
 	pr_info("providing IPIs using SBI IPI extension\n");
 
 	/*
-- 
2.43.0


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^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 3/5] clocksource: clint: Use IPI_MAX for IPI muxing
  2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
  2026-08-16  7:00 ` [PATCH 1/5] riscv: smp: Move enum ipi_message_type to asm/smp.h Guo Ren
  2026-08-16  7:00 ` [PATCH 2/5] riscv: sbi: Use IPI_MAX for SBI IPI muxing Guo Ren
@ 2026-08-16  7:00 ` Guo Ren
  2026-08-16  7:00 ` [PATCH 4/5] irqchip/aclint-sswi: " Guo Ren
  2026-08-16  7:00 ` [PATCH 5/5] irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI Guo Ren
  4 siblings, 0 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

Replace the hard-coded BITS_PER_BYTE with IPI_MAX now that the
constant is exported from riscv asm/smp.h.

Signed-off-by: GUO Ren (XuanTie) <guoren@kernel.org>
---
 drivers/clocksource/timer-clint.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index 0bdd9d7ec545..e56eee7e3781 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -243,7 +243,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
 	}
 
 #ifdef CONFIG_SMP
-	rc = ipi_mux_create(BITS_PER_BYTE, clint_send_ipi);
+	rc = ipi_mux_create(IPI_MAX, clint_send_ipi);
 	if (rc <= 0) {
 		pr_err("unable to create muxed IPIs\n");
 		rc = (rc < 0) ? rc : -ENODEV;
@@ -251,7 +251,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
 	}
 
 	irq_set_chained_handler(clint_ipi_irq, clint_ipi_interrupt);
-	riscv_ipi_set_virq_range(rc, BITS_PER_BYTE);
+	riscv_ipi_set_virq_range(rc, IPI_MAX);
 	clint_clear_ipi();
 #endif
 
-- 
2.43.0


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linux-riscv@lists.infradead.org
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^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 4/5] irqchip/aclint-sswi: Use IPI_MAX for IPI muxing
  2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
                   ` (2 preceding siblings ...)
  2026-08-16  7:00 ` [PATCH 3/5] clocksource: clint: Use IPI_MAX for " Guo Ren
@ 2026-08-16  7:00 ` Guo Ren
  2026-08-16  7:00 ` [PATCH 5/5] irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI Guo Ren
  4 siblings, 0 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

Replace the hard-coded BITS_PER_BYTE with IPI_MAX now that the constant
is exported from riscv asm/smp.h.

Signed-off-by: GUO Ren (XuanTie) <guoren@kernel.org>
---
 drivers/irqchip/irq-aclint-sswi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-aclint-sswi.c b/drivers/irqchip/irq-aclint-sswi.c
index ca06efd86fa1..5e010fc401f7 100644
--- a/drivers/irqchip/irq-aclint-sswi.c
+++ b/drivers/irqchip/irq-aclint-sswi.c
@@ -138,7 +138,7 @@ static int __init aclint_sswi_probe(struct fwnode_handle *fwnode)
 	}
 
 	/* Register SSWI irq and handler */
-	virq = ipi_mux_create(BITS_PER_BYTE, aclint_sswi_ipi_send);
+	virq = ipi_mux_create(IPI_MAX, aclint_sswi_ipi_send);
 	if (virq <= 0) {
 		pr_err("unable to create muxed IPIs\n");
 		irq_dispose_mapping(sswi_ipi_virq);
@@ -152,7 +152,7 @@ static int __init aclint_sswi_probe(struct fwnode_handle *fwnode)
 			  aclint_sswi_starting_cpu,
 			  aclint_sswi_dying_cpu);
 
-	riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
+	riscv_ipi_set_virq_range(virq, IPI_MAX);
 
 	return 0;
 }
-- 
2.43.0


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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 5/5] irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI
  2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
                   ` (3 preceding siblings ...)
  2026-08-16  7:00 ` [PATCH 4/5] irqchip/aclint-sswi: " Guo Ren
@ 2026-08-16  7:00 ` Guo Ren
  4 siblings, 0 replies; 6+ messages in thread
From: Guo Ren @ 2026-08-16  7:00 UTC (permalink / raw)
  To: linux-riscv, linux-kernel
  Cc: palmer, pjw, aou, alex, tglx, daniel.lezcano, anup, hui.wang,
	samuel.holland, GUO Ren (XuanTie)

From: "GUO Ren (XuanTie)" <guoren@kernel.org>

IMSIC was defining its own IMSIC_NR_IPI (= 8) which happened to match
the architecture's IPI_MAX. Now that IPI_MAX is exported from riscv
asm/smp.h, use the architecture constant and drop the private define.

This keeps the number of multiplexed IPIs in sync with the rest of the
RISC-V IPI infrastructure.

Signed-off-by: GUO Ren (XuanTie) <guoren@kernel.org>
---
 drivers/irqchip/irq-riscv-imsic-early.c | 4 ++--
 drivers/irqchip/irq-riscv-imsic-state.h | 1 -
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-riscv-imsic-early.c b/drivers/irqchip/irq-riscv-imsic-early.c
index 12efd241ce88..823f5f2ecb3d 100644
--- a/drivers/irqchip/irq-riscv-imsic-early.c
+++ b/drivers/irqchip/irq-riscv-imsic-early.c
@@ -67,12 +67,12 @@ static int __init imsic_ipi_domain_init(void)
 		return 0;
 
 	/* Create IMSIC IPI multiplexing */
-	virq = ipi_mux_create(IMSIC_NR_IPI, imsic_ipi_send);
+	virq = ipi_mux_create(IPI_MAX, imsic_ipi_send);
 	if (virq <= 0)
 		return virq < 0 ? virq : -ENOMEM;
 
 	/* Set vIRQ range */
-	riscv_ipi_set_virq_range(virq, IMSIC_NR_IPI);
+	riscv_ipi_set_virq_range(virq, IPI_MAX);
 
 	/* Announce that IMSIC is providing IPIs */
 	pr_info("%pfwP: providing IPIs using interrupt %d\n", imsic->fwnode, IMSIC_IPI_ID);
diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-riscv-imsic-state.h
index c42ee180b305..878cc192ccec 100644
--- a/drivers/irqchip/irq-riscv-imsic-state.h
+++ b/drivers/irqchip/irq-riscv-imsic-state.h
@@ -13,7 +13,6 @@
 #include <linux/timer.h>
 
 #define IMSIC_IPI_ID				1
-#define IMSIC_NR_IPI				8
 
 struct imsic_vector {
 	/* Fixed details of the vector */
-- 
2.43.0


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^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-08-16  7:01 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-16  7:00 [PATCH 0/5] riscv: Make IPI_MAX visible and use it consistently Guo Ren
2026-08-16  7:00 ` [PATCH 1/5] riscv: smp: Move enum ipi_message_type to asm/smp.h Guo Ren
2026-08-16  7:00 ` [PATCH 2/5] riscv: sbi: Use IPI_MAX for SBI IPI muxing Guo Ren
2026-08-16  7:00 ` [PATCH 3/5] clocksource: clint: Use IPI_MAX for " Guo Ren
2026-08-16  7:00 ` [PATCH 4/5] irqchip/aclint-sswi: " Guo Ren
2026-08-16  7:00 ` [PATCH 5/5] irqchip/imsic: Use IPI_MAX instead of IMSIC_NR_IPI Guo Ren

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