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From: fangyu.yu@linux.alibaba.com
To: jgg@ziepe.ca
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
	anup@brainfault.org, aou@eecs.berkeley.edu,
	atish.patra@linux.dev, baolu.lu@linux.intel.com,
	fangyu.yu@linux.alibaba.com, guoren@kernel.org,
	iommu@lists.linux.dev, joro@8bytes.org, jroedel@suse.de,
	kevin.tian@intel.com, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	pjw@kernel.org, robin.murphy@arm.com, skhawaja@google.com,
	tomasz.jeznach@linux.dev, vasant.hegde@amd.com, will@kernel.org,
	zong.li@sifive.com
Subject: Re: [RFC PATCH v3 02/10] iommupt: Add RISC-V dirty tracking PTE ops
Date: Sat, 22 Aug 2026 23:01:57 +0800	[thread overview]
Message-ID: <20260822150157.27501-1-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <20260821140341.GC1114497@ziepe.ca>

>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>
>> Implement the three dirty-tracking hooks required by the generic page
>> table framework for the RISC-V format:
>>
>>   pt_entry_is_write_dirty():
>>     Check the D bit (bit 7) in the PTE.
>>
>>   pt_entry_make_write_clean():
>>     Clear the D bit across the full contiguous range.
>>
>>   pt_entry_make_write_dirty():
>>     Atomically set D via try_cmpxchg64() on a single PTE.
>>
>> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>> ---
>>  drivers/iommu/generic_pt/fmt/riscv.h | 43 ++++++++++++++++++++++++++++
>>  1 file changed, 43 insertions(+)
>>
>> diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h
>> index 5692c033dbde..09581798e753 100644
>> --- a/drivers/iommu/generic_pt/fmt/riscv.h
>> +++ b/drivers/iommu/generic_pt/fmt/riscv.h
>> @@ -226,6 +226,49 @@ static inline void riscvpt_attr_from_entry(const struct pt_state *pts,
>>  }
>>  #define pt_attr_from_entry riscvpt_attr_from_entry
>
>Does this work for all stages or does it need  pt_dirty_supported ?

Good catch, no it doesn't. This patch didn't add a pt_dirty_supported(),
so it falls back to the default "always true", which isn't right --
iommu.c only sets TC.GADE and wires up dirty_ops for second-stage
domains, first-stage never gets TC.SADE set.

Thanks,
Fangyu

>
>Jason
>

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linux-riscv mailing list
linux-riscv@lists.infradead.org
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  reply	other threads:[~2026-08-22 15:02 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-21 13:27 [RFC PATCH v3 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 01/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-08-21 13:55   ` Jason Gunthorpe
2026-08-22 14:55     ` fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 02/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-08-21 14:03   ` Jason Gunthorpe
2026-08-22 15:01     ` fangyu.yu [this message]
2026-08-21 13:27 ` [RFC PATCH v3 03/10] iommu/riscv: report iommu capabilities fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-08-21 13:27 ` [RFC PATCH v3 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu

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