From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Vincent Chen <vincent.chen@sifive.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Paul Walmsley <paul.walmsley@sifive.com>
Subject: Re: [PATCH v3 2/2] rseq/selftests: Add support for RISC-V
Date: Thu, 3 Mar 2022 16:50:38 -0500 (EST) [thread overview]
Message-ID: <214245560.121082.1646344238921.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <CABvJ_xiSreWvQ5c+_XW8RWSWUvx69qNc7pwrKVWspg0C9Sy2NQ@mail.gmail.com>
----- On Mar 3, 2022, at 2:16 AM, Vincent Chen vincent.chen@sifive.com wrote:
> On Thu, Mar 3, 2022 at 12:38 AM Mathieu Desnoyers
> <mathieu.desnoyers@efficios.com> wrote:
>>
[...]
>> > +#if __ORDER_LITTLE_ENDIAN__ == 1234
>>
>> I think we'll want to standardize on this for endianness checking (same as
>> the updated uapi rseq.h):
>>
>> #if defined(__BYTE_ORDER) ? (__BYTE_ORDER == __LITTLE_ENDIAN) :
>> defined(__LITTLE_ENDIAN)
>>
>> We may have to change rseq-mips.h in the rseq selftests to do the same as well
>> rather than
>> using "# ifdef __BIG_ENDIAN".
>>
>
> OK, I can follow it. However, I found the endianness checking in
> include/uapi/linux/rseq.h is
> #if (defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN)) ||
> defined(__BIG_ENDIAN)
>
> It is a little different than what you mentioned early. Should I
> follow the format in include/uapi/linux/rseq.h? or both formats are
> OK?
>
The form "#if (defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN)) || defined(__BIG_ENDIAN)
is completely buggy. Don't use that.
I've sent the fix to Peter to remove the offending #if here:
https://lore.kernel.org/lkml/1445357149.71067.1643137248305.JavaMail.zimbra@efficios.com/T/#mbbad3961494feefb98cb6d092879e3ea41b33df8
Please use the correct non-bogus form instead:
#if defined(__BYTE_ORDER) ? (__BYTE_ORDER == __LITTLE_ENDIAN) : defined(__LITTLE_ENDIAN)
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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next prev parent reply other threads:[~2022-03-03 21:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-02 2:30 [PATCH v3 0/2] RISC-V: add support for restartable sequence Vincent Chen
2022-03-02 2:30 ` [PATCH v3 1/2] RISC-V: Add " Vincent Chen
2022-03-02 16:29 ` Mathieu Desnoyers
2022-03-03 3:32 ` Vincent Chen
2022-03-02 2:30 ` [PATCH v3 2/2] rseq/selftests: Add support for RISC-V Vincent Chen
2022-03-02 16:38 ` Mathieu Desnoyers
2022-03-03 7:16 ` Vincent Chen
2022-03-03 21:50 ` Mathieu Desnoyers [this message]
2022-03-04 6:50 ` Vincent Chen
2022-03-07 2:45 ` Vincent Chen
2022-03-07 13:40 ` Mathieu Desnoyers
2022-03-08 7:30 ` Eric Lin
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