Linux-RISC-V Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Alex Elder <elder@riscstar.com>
To: Yao Zi <ziyao@disroot.org>,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
	bhelgaas@google.com, vkoul@kernel.org, kishon@kernel.org
Cc: dlan@gentoo.org, paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, p.zabel@pengutronix.de,
	tglx@linutronix.de, johan+linaro@kernel.org,
	thippeswamy.havalige@amd.com, namcao@linutronix.de,
	mayank.rana@oss.qualcomm.com, shradha.t@samsung.com,
	inochiama@gmail.com, quic_schintav@quicinc.com,
	fan.ni@samsung.com, devicetree@vger.kernel.org,
	linux-phy@lists.infradead.org, linux-pci@vger.kernel.org,
	spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY
Date: Thu, 14 Aug 2025 07:30:52 -0500	[thread overview]
Message-ID: <8f7bac84-623b-47dc-bc58-dc0013a85877@riscstar.com> (raw)
In-Reply-To: <aJ1PJBax-Pj983OZ@pie>

On 8/13/25 9:52 PM, Yao Zi wrote:
> On Wed, Aug 13, 2025 at 01:46:55PM -0500, Alex Elder wrote:
>> Add the Device Tree binding for the PCIe/USB 3.0 combo PHY found in
>> the SpacemiT K1 SoC.  This is one of three PCIe PHYs, and is unusual
>> in that only the combo PHY can perform a calibration step needed to
>> determine settings used by the other two PCIe PHYs.
>>
>> Calibration must be done with the combo PHY in PCIe mode, and to allow
>> this to occur independent of the eventual use for the PHY (PCIe or USB)
>> some PCIe-related properties must be supplied: clocks; resets; and a
>> syscon phandle.
>>
>> Signed-off-by: Alex Elder <elder@riscstar.com>
>> ---
>>   .../bindings/phy/spacemit,k1-combo-phy.yaml   | 110 ++++++++++++++++++
>>   1 file changed, 110 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
>> new file mode 100644
>> index 0000000000000..ed78083a53231
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
> 
> ...
> 
>> +  spacemit,syscon-pmu:
>> +    description:
>> +      PHandle that refers to the APMU system controller, whose
>> +      regmap is used in setting the mode
>> +    $ref: /schemas/types.yaml#/definitions/phandle
> 
> Clock controllers and ethernet controllers all use spacemit,apmu to
> refer the APMU system controller. Do you think it's better to keep them
> aligned?

I do think it's better to keep them aligned.

And I appreciate your noticing this.  I don't see anything
that's accepted upstream that defines properties like this,
but I now see this:
  
https://lore.kernel.org/lkml/20250812-net-k1-emac-v5-2-dd17c4905f49@iscas.ac.cn/

I did a quick scan for what others do when a property's
value is a phandle, and other than just "syscon" it seems
that word is omitted.

So unless someone else suggests otherwise, I'll use
"spacemit,apmu" for this property in my next version.

> ...
> 
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/spacemit,k1-syscon.h>
>> +    combo_phy: phy@c0b10000 {
> 
> This label is unnecessary.

OK.  I used it when testing USB but we can add the label
back when that driver gets reviewed.

>> +        compatible = "spacemit,k1-combo-phy";
>> +        reg = <0xc0b10000 0x1000>;
>> +        clocks = <&syscon_apmu CLK_PCIE0_DBI>,
>> +                 <&syscon_apmu CLK_PCIE0_MASTER>,
>> +                 <&syscon_apmu CLK_PCIE0_SLAVE>;
>> +        clock-names = "dbi",
>> +                      "mstr",
>> +                      "slv";
>> +        resets = <&syscon_apmu RESET_PCIE0_DBI>,
>> +                 <&syscon_apmu RESET_PCIE0_MASTER>,
>> +                 <&syscon_apmu RESET_PCIE0_SLAVE>,
>> +                 <&syscon_apmu RESET_PCIE0_GLOBAL>;
>> +        reset-names = "dbi",
>> +                      "mstr",
>> +                      "slv",
>> +                      "global";
>> +        spacemit,syscon-pmu = <&syscon_apmu>;
>> +        #phy-cells = <1>;
>> +        status = "disabled";
>> +    };
> 
> Best regards,
> Yao Zi

Thanks a lot.

					-Alex


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-08-14 13:30 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-13 18:46 [PATCH 0/6] Introduce SpacemiT K1 PCIe phy and host controller Alex Elder
2025-08-13 18:46 ` [PATCH 1/6] dt-bindings: phy: spacemit: add SpacemiT PCIe/combo PHY Alex Elder
2025-08-14  2:52   ` Yao Zi
2025-08-14 12:30     ` Alex Elder [this message]
2025-08-14  6:11   ` Krzysztof Kozlowski
2025-08-14 11:59     ` Alex Elder
2025-08-14 20:51   ` Rob Herring
2025-08-14 21:48     ` Alex Elder
2025-08-13 18:46 ` [PATCH 2/6] dt-bindings: phy: spacemit: introduce PCIe PHY Alex Elder
2025-08-14  6:17   ` Krzysztof Kozlowski
2025-08-13 18:46 ` [PATCH 3/6] dt-bindings: phy: spacemit: introduce PCIe root complex Alex Elder
2025-08-13 20:49   ` Rob Herring (Arm)
2025-08-13 21:21     ` Alex Elder
2025-09-15  8:14   ` Manivannan Sadhasivam
2025-09-19 20:14     ` Alex Elder
2025-09-20  5:55       ` Manivannan Sadhasivam
2025-10-01  2:40         ` Alex Elder
2025-08-13 18:46 ` [PATCH 4/6] phy: spacemit: introduce PCIe/combo PHY Alex Elder
2025-08-13 23:42   ` Inochi Amaoto
2025-08-14 12:15     ` Alex Elder
2025-08-14 22:49       ` Inochi Amaoto
2025-08-14 23:57       ` Yixun Lan
2025-08-13 18:46 ` [PATCH 5/6] PCI: spacemit: introduce SpacemiT PCIe host driver Alex Elder
2025-08-13 21:22   ` Bjorn Helgaas
2025-08-13 21:27     ` Alex Elder
2025-09-19 18:06       ` Alex Elder
2025-09-15  8:09   ` Manivannan Sadhasivam
2025-09-19 22:10     ` Alex Elder
2025-09-20  5:33       ` Manivannan Sadhasivam
2025-10-01  2:40       ` Alex Elder
2025-08-13 18:47 ` [PATCH 6/6] riscv: dts: spacemit: PCIe and PHY-related updates Alex Elder

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8f7bac84-623b-47dc-bc58-dc0013a85877@riscstar.com \
    --to=elder@riscstar.com \
    --cc=alex@ghiti.fr \
    --cc=aou@eecs.berkeley.edu \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dlan@gentoo.org \
    --cc=fan.ni@samsung.com \
    --cc=inochiama@gmail.com \
    --cc=johan+linaro@kernel.org \
    --cc=kishon@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kwilczynski@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=mani@kernel.org \
    --cc=mayank.rana@oss.qualcomm.com \
    --cc=namcao@linutronix.de \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=quic_schintav@quicinc.com \
    --cc=robh@kernel.org \
    --cc=shradha.t@samsung.com \
    --cc=spacemit@lists.linux.dev \
    --cc=tglx@linutronix.de \
    --cc=thippeswamy.havalige@amd.com \
    --cc=vkoul@kernel.org \
    --cc=ziyao@disroot.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox