From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Anup Patel" <apatel@ventanamicro.com>
Cc: "Atish Patra" <atish.patra@linux.dev>,
<kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andrew Jones" <ajones@ventanamicro.com>
Subject: Re: [PATCH v3 0/2] RISC-V: KVM: VCPU reset fixes
Date: Fri, 23 May 2025 11:20:20 +0200 [thread overview]
Message-ID: <DA3FGGI5PEZG.3T26KJXT2QO8M@ventanamicro.com> (raw)
In-Reply-To: <CAK9=C2Xi3=9JL5f=0as2nEYKuRVTtJoL6Vdt_y2E06ta6G_07A@mail.gmail.com>
2025-05-23T13:38:26+05:30, Anup Patel <apatel@ventanamicro.com>:
> On Fri, May 23, 2025 at 12:47 PM Radim Krčmář <rkrcmar@ventanamicro.com> wrote:
>>
>> 2025-05-22T14:43:40-07:00, Atish Patra <atish.patra@linux.dev>:
>> > On 5/15/25 7:37 AM, Radim KrÄmáŠwrote:
>> >> Hello,
>> >>
>> >> the design still requires a discussion.
>> >>
>> >> [v3 1/2] removes most of the additional changes that the KVM capability
>> >> was doing in v2. [v3 2/2] is new and previews a general solution to the
>> >> lack of userspace control over KVM SBI.
>> >>
>> >
>> > I am still missing the motivation behind it. If the motivation is SBI
>> > HSM suspend, the PATCH2 doesn't achieve that as it forwards every call
>> > to the user space. Why do you want to control hsm start/stop from the
>> > user space ?
>>
>> HSM needs fixing, because KVM doesn't know what the state after
>> sbi_hart_start should be.
>> For example, we had a discussion about scounteren and regardless of what
>> default we choose in KVM, the userspace might want a different value.
>> I don't think that HSM start/stop is a hot path, so trapping to
>> userspace seems better than adding more kernel code.
>
> There are no implementation specific S-mode CSR reset values
> required at the moment.
Jessica mentioned that BSD requires scounteren to be non-zero, so
userspace should be able to provide that value.
I would prefer if KVM could avoid getting into those discussions.
We can just just let userspace be as crazy as it wants.
> Whenever the need arises, we will extend
> the ONE_REG interface so that user space can specify custom
> CSR reset values at Guest/VM creation time. We don't need to
> forward SBI HSM calls to user space for custom S-mode CSR
> reset values.
The benefits of adding a new ONE_REG interface seem very small compared
to the drawbacks of having extra kernel code.
If userspace would want to reset or setup new multi-VCPUs VMs often, we
could add an interface that loads the whole register state from
userspace in a single IOCTL, because ONE_REG is not the best interface
for bulk data transfer either.
>> Forwarding all the unimplemented SBI ecalls shouldn't be a performance
>> issue, because S-mode software would hopefully learn after the first
>> error and stop trying again.
>>
>> Allowing userspace to fully implement the ecall instruction one of the
>> motivations as well -- SBI is not a part of RISC-V ISA, so someone might
>> be interested in accelerating a different M-mode software with KVM.
>>
>> I'll send v4 later today -- there is a missing part in [2/2], because
>> userspace also needs to be able to emulate the base SBI extension.
>>
>
> [...] The best approach is to selectively forward SBI
> calls to user space where needed (e.g. SBI system reset,
> SBI system suspend, SBI debug console, etc.).
That is exactly what my proposal does, it's just that the userspace says
what is "needed".
If we started with this mechanism, KVM would not have needed to add
SRST/SUSP/DBCN SBI emulation at all -- they would be forwarded as any
other unhandled ecall.
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next prev parent reply other threads:[~2025-05-23 9:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-15 14:37 [PATCH v3 0/2] RISC-V: KVM: VCPU reset fixes Radim Krčmář
2025-05-15 14:37 ` [PATCH v3 1/2] RISC-V: KVM: add KVM_CAP_RISCV_MP_STATE_RESET Radim Krčmář
2025-05-16 12:25 ` Anup Patel
2025-05-19 12:25 ` Radim Krčmář
2025-05-20 15:43 ` Anup Patel
2025-05-15 14:37 ` [PATCH v3 2/2] RISC-V: KVM: add KVM_CAP_RISCV_USERSPACE_SBI Radim Krčmář
2025-05-22 21:43 ` [PATCH v3 0/2] RISC-V: KVM: VCPU reset fixes Atish Patra
2025-05-23 7:17 ` Radim Krčmář
2025-05-23 8:08 ` Anup Patel
2025-05-23 9:20 ` Radim Krčmář [this message]
2025-05-23 17:44 ` Atish Patra
2025-05-24 9:59 ` Anup Patel
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