From: Lv Zheng <lv.zheng@linux.spacemit.com>
To: Tomasz Jeznach <tjeznach@rivosinc.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: Jingyu Li <joey.li@spacemit.com>,
Lv Zheng <lv.zheng@linux.spacemit.com>,
Zhijian Chen <zhijian@spacemit.com>,
iommu@lists.linux.dev, linux-perf-users@vger.kernel.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
devicetree@vger.kernel.org
Subject: [PATCH v3 0/8] iommu/riscv: Add HPM support for RISC-V IOMMU
Date: Wed, 4 Feb 2026 17:08:19 +0800 [thread overview]
Message-ID: <F9748E3984D2A6F9+cover.1770195980.git.lv.zheng@linux.spacemit.com> (raw)
In-Reply-To: <cover.1769562575.git.lv.zheng@spacemit.com>
Includes HPM support for RISC-V IOMMU. The HPM hardware mechanism can be
found in the recent announced SpacemiT SoCs (K3, V100), where T100
(SpacemiT distributed IOMMU) is shipped.
Revisions:
v1
Initial release.
v2 (sent as v1.1)
Split and cleanup DT-bindings.
v3
Refactor using vendor specific compatible.
The tested result can be found as follows:
root@sdfirm:~# perf stat --timeout 5000 -a -e spacemit_ioats_hpm_00/dd_walk,config1=0x20c0010000000000/ dmatest; sleep 1
[ 145.630224] dmatest: Started 1 threads using dma0chan0
[ 145.644896] dmatest: dma0chan0-copy0: summary 1 tests, 0 failures 123.60 iops 123 KB/s (0)
Performance counter stats for 'system wide':
3 spacemit_ioats_hpm_00/dd_walk,config1=0x20c0010000000000/
0.193108000 seconds time elapsed
root@sdfirm:~# echo dma0chan1 > /sys/module/dmatest/parameters/channel
[ 327.001820] dmatest: Added 1 threads using dma0chan1
root@sdfirm:~# perf stat --timeout 5000 -a -e spacemit_ioats_hpm_00/s_walk,config1=0x20c0011000000000/ dmatest; sleep 1
[ 484.037180] dmatest: Started 1 threads using dma0chan1
[ 484.048832] dmatest: dma0chan1-copy0: summary 1 tests, 0 failures 172.11 iops 172 KB/s (0)
Performance counter stats for 'system wide':
6 spacemit_ioats_hpm_00/s_walk,config1=0x20c0011000000000/
0.191970000 seconds time elapsed
root@sdfirm:~# perf stat --timeout 5000 -a -e spacemit_ioatc_hpm_0003/tlb_mis,config1=0x20c0011000000000/ dmatest; sleep 1
[ 546.332494] dmatest: No channels configured, continue with any
[ 546.363062] dmatest: Added 1 threads using dma0chan1
[ 546.377994] dmatest: Started 1 threads using dma0chan1
[ 546.388376] dmatest: dma0chan1-copy0: summary 1 tests, 0 failures 213.94 iops 213 KB/s (0)
Performance counter stats for 'system wide':
3 spacemit_ioatc_hpm_0003/tlb_mis,config1=0x20c0011000000000/
0.225062000 seconds time elapsed
Jingyu Li (3):
iommu/riscv: Enable IOMMU DMA mapping support
iommu/riscv: Fix WSI mode IRQ number handling
iommu/riscv: Add HPM support for performance monitoring
Lv Zheng (5):
dt-bindings: iommu: Add spacemit/t100 features
riscv/iommu: Add vendor event support for RISC-V IOMMU HPM
spacemit/t100: Add global filter awareness for RISC-V IOMMU HPM
spacemit/t100: Add SpacemiT T100 IOATC HPM support
perf vendor events riscv:: Add support for spacemit,riscv-iommu HPM
aliasing
.../bindings/iommu/riscv,iommu.yaml | 37 +
MAINTAINERS | 3 +
drivers/iommu/Kconfig | 2 +-
drivers/iommu/riscv/Kconfig | 9 +
drivers/iommu/riscv/Makefile | 1 +
drivers/iommu/riscv/iommu-bits.h | 18 +
drivers/iommu/riscv/iommu-hpm.c | 1122 +++++++++++++++++
drivers/iommu/riscv/iommu-pci.c | 13 +-
drivers/iommu/riscv/iommu-platform.c | 12 +-
drivers/iommu/riscv/iommu.c | 25 +-
drivers/iommu/riscv/iommu.h | 46 +-
.../arch/riscv/spacemit/iommu/sys/ioatc.json | 30 +
.../arch/riscv/spacemit/iommu/sys/ioats.json | 163 +++
13 files changed, 1469 insertions(+), 12 deletions(-)
create mode 100644 drivers/iommu/riscv/iommu-hpm.c
create mode 100644 tools/perf/pmu-events/arch/riscv/spacemit/iommu/sys/ioatc.json
create mode 100644 tools/perf/pmu-events/arch/riscv/spacemit/iommu/sys/ioats.json
--
2.43.0
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next prev parent reply other threads:[~2026-02-04 9:09 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1769562575.git.lv.zheng@spacemit.com>
2026-01-29 6:08 ` [PATCH v1.1 0/7] iommu/riscv: Add HPM support for RISC-V IOMMU Lv Zheng
2026-01-29 6:08 ` [PATCH v1.1 1/7] iommu/riscv: Enable IOMMU DMA mapping support Lv Zheng
2026-01-29 6:08 ` [PATCH v1.1 2/7] iommu/riscv: Fix WSI mode IRQ number handling Lv Zheng
2026-01-29 6:08 ` [PATCH v1.1 3/7] iommu/riscv: Add HPM support for performance monitoring Lv Zheng
2026-01-29 6:09 ` [PATCH v1.1 4/7] dt-bindings: iommu: Add spacemit/t100 features Lv Zheng
2026-01-29 10:08 ` Conor Dooley
2026-01-29 10:43 ` 郑律
2026-01-29 16:41 ` Conor Dooley
2026-01-29 17:06 ` Robin Murphy
2026-01-30 1:30 ` 郑律
2026-01-30 1:39 ` 郑律
2026-01-29 6:09 ` [PATCH v1.1 5/7] spacemit/t100: Add vendor event support for RISC-V IOMMU HPM Lv Zheng
2026-01-29 6:09 ` [PATCH v1.1 6/7] spacemit/t100: Add global filter " Lv Zheng
2026-01-29 6:09 ` [PATCH v1.1 7/7] spacemit/t100: Add SpacemiT T100 IOATC HPM support Lv Zheng
2026-02-06 10:44 ` [PATCH v1.1 0/7] iommu/riscv: Add HPM support for RISC-V IOMMU Krzysztof Kozlowski
2026-02-04 9:08 ` Lv Zheng [this message]
2026-02-06 10:44 ` [PATCH v3 0/8] " Krzysztof Kozlowski
2026-02-07 3:41 ` Lv Zheng
2026-02-13 22:21 ` Yixun Lan
2026-02-27 5:55 ` Lv Zheng
[not found] ` <cover.1770195980.git.lv.zheng@linux.spacemit.com>
2026-02-04 9:08 ` [PATCH v3 1/8] iommu/riscv: Enable IOMMU DMA mapping support Lv Zheng
2026-02-04 9:08 ` [PATCH v3 2/8] iommu/riscv: Fix WSI mode IRQ number handling Lv Zheng
2026-02-04 17:20 ` Andrew Jones
2026-02-05 3:52 ` Lv Zheng
2026-02-05 15:04 ` Andrew Jones
2026-02-06 1:36 ` Lv Zheng
2026-02-04 9:09 ` [PATCH v3 3/8] iommu/riscv: Add HPM support for performance monitoring Lv Zheng
2026-02-04 18:39 ` Andrew Jones
2026-02-05 2:11 ` Zong Li
2026-02-05 3:35 ` Lv Zheng
2026-02-05 3:47 ` Zong Li
2026-02-05 6:11 ` Lv Zheng
2026-02-05 15:23 ` Andrew Jones
2026-02-06 3:42 ` Lv Zheng
2026-02-06 15:09 ` Andrew Jones
2026-02-07 2:11 ` Zong Li
2026-02-04 9:09 ` [PATCH v3 4/8] dt-bindings: iommu: Add spacemit/t100 features Lv Zheng
2026-02-04 17:37 ` Conor Dooley
2026-02-05 3:11 ` Lv Zheng
2026-02-05 18:24 ` Conor Dooley
2026-02-06 1:33 ` Lv Zheng
2026-02-06 10:24 ` Conor Dooley
2026-02-07 4:24 ` Lv Zheng
2026-02-07 14:55 ` Conor Dooley
2026-02-04 9:09 ` [PATCH v3 5/8] riscv/iommu: Add vendor event support for RISC-V IOMMU HPM Lv Zheng
2026-02-04 9:09 ` [PATCH v3 6/8] spacemit/t100: Add global filter awareness " Lv Zheng
2026-02-04 9:09 ` [PATCH v3 7/8] spacemit/t100: Add SpacemiT T100 IOATC HPM support Lv Zheng
2026-02-04 9:09 ` [PATCH v3 8/8] perf vendor events riscv:: Add support for spacemit,riscv-iommu HPM aliasing Lv Zheng
2026-02-04 17:38 ` Conor Dooley
2026-02-05 3:22 ` Lv Zheng
2026-02-05 9:09 ` [PATCH v4 0/7] iommu/riscv: Add HPM support for RISC-V IOMMU Lv Zheng
2026-02-06 10:46 ` Krzysztof Kozlowski
2026-02-07 3:54 ` Lv Zheng
[not found] ` <cover.1770281596.git.lv.zheng@linux.spacemit.com>
2026-02-05 9:10 ` [PATCH v4 1/7] iommu/riscv: Enable IOMMU DMA mapping support Lv Zheng
2026-02-05 9:10 ` [PATCH v4 2/7] iommu/riscv: Add HPM support for performance monitoring Lv Zheng
2026-02-05 9:10 ` [PATCH v4 3/7] dt-bindings: iommu: Add spacemit/t100 features Lv Zheng
2026-02-05 18:26 ` Conor Dooley
2026-02-06 3:44 ` Lv Zheng
2026-02-05 9:10 ` [PATCH v4 4/7] iommu/riscv: Add vendor event support for RISC-V IOMMU HPM Lv Zheng
2026-02-05 9:11 ` [PATCH v4 5/7] spacemit/t100: Add global filter awareness " Lv Zheng
2026-02-05 9:11 ` [PATCH v4 6/7] spacemit/t100: Add SpacemiT T100 IOATC HPM support Lv Zheng
2026-02-05 9:11 ` [PATCH v4 7/7] perf vendor events riscv:: Add support for spacemit,riscv-iommu HPM aliasing Lv Zheng
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