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* [GIT PULL] Microchip DT for v6.1
@ 2022-10-12 16:29 Conor Dooley
  2022-10-12 22:07 ` Palmer Dabbelt
  0 siblings, 1 reply; 2+ messages in thread
From: Conor Dooley @ 2022-10-12 16:29 UTC (permalink / raw)
  To: palmer; +Cc: conor.dooley, linux-riscv

Hey Palmer,

Late as previously mentioned since I had to wait for the reference
design to actually get released - there's an -rc1 up on GitHub for it
now that people can actually use :)

It's all been in linux-next for a while, apart from the HEAD commit that
is a fix I added last week rather than send you something I knew was
wrong.

There's one conflict between this PR and some stuff I sent via fixes,
but the resolution should be easy. The commit on -fixes deleted the
microchip,matr0 property from the PCI node & when I moved the PCI node
into the -fabric.dtsi I accounted for that removal. The correct
resolution is to take this PR's version & remove the node from
mpfs.dtsi.

Thanks,
Conor.

The following changes since commit 69dac8e431af26173ca0a1ebc87054e01c585bcc:

  Merge tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2022-
08-12 18:39:43 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/dt-for-palmer-v6.1-mw1

for you to fetch changes up to c210b91818e81068ca2573c20684644b8e110a07:

  riscv: dts: microchip: fix fabric i2c reg size (2022-10-07 13:43:42 +0100)

----------------------------------------------------------------
Microchip RISC-V devicetrees for v6.1

Fixups, reference design changes and new boards:
- The addition of QSPI support for mpfs had a corresponding change to
  the devicetree node.
- The v2022.{09,10} reference designs brought with them several memory
  map changes which are not backwards compatible. The old devicetrees
  from the v2022.08 and earlier releases still work with current
  kernels.
- Two new devicetrees for a first-party development kit and for the
  Aries Embedded M100FPSEVP kit.
- Corresponding dt-bindings changes for the above.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Conor Dooley (11):
      riscv: dts: microchip: add qspi compatible fallback
      dt-bindings: riscv: microchip: document icicle reference design
      dt-bindings: riscv: microchip: document the aries m100pfsevp
      riscv: dts: microchip: add pci dma ranges for the icicle kit
      riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi
      riscv: dts: microchip: icicle: update pci address properties
      riscv: dts: microchip: icicle: re-jig fabric peripheral addresses
      riscv: dts: microchip: reduce the fic3 clock rate
      riscv: dts: microchip: add a devicetree for aries' m100pfsevp
      riscv: dts: microchip: update memory configuration for v2022.10
      riscv: dts: microchip: fix fabric i2c reg size

Shravan Chippa (1):
      dt-bindings: riscv: microchip: document the sev kit

Vattipalli Praveen (1):
      riscv: dts: microchip: add sevkit device tree

 Documentation/devicetree/bindings/riscv/microchip.yaml    |  20 +++--
 arch/riscv/boot/dts/microchip/Makefile                    |   2 +
 arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi |  43 ++++++++--
 arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts         |  18 +++-
 arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi    |  45 ++++++++++
 arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts         | 179 ++++++++++++++++++++++++++++++++++++++++
 arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi |  29 +++++++
 arch/riscv/boot/dts/microchip/mpfs-sev-kit-fabric.dtsi    |  45 ++++++++++
 arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts            | 145 ++++++++++++++++++++++++++++++++
 arch/riscv/boot/dts/microchip/mpfs.dtsi                   |  32 +------
 10 files changed, 512 insertions(+), 46 deletions(-)
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-sev-kit-fabric.dtsi
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [GIT PULL] Microchip DT for v6.1
  2022-10-12 16:29 [GIT PULL] Microchip DT for v6.1 Conor Dooley
@ 2022-10-12 22:07 ` Palmer Dabbelt
  0 siblings, 0 replies; 2+ messages in thread
From: Palmer Dabbelt @ 2022-10-12 22:07 UTC (permalink / raw)
  To: Conor Dooley, Palmer Dabbelt; +Cc: conor.dooley, linux-riscv

[trying b4 to merge a PR for the first time...]

On Wed, 12 Oct 2022 17:29:09 +0100, Conor Dooley wrote:
> Hey Palmer,
> 
> Late as previously mentioned since I had to wait for the reference
> design to actually get released - there's an -rc1 up on GitHub for it
> now that people can actually use :)
> 
> It's all been in linux-next for a while, apart from the HEAD commit that
> is a fix I added last week rather than send you something I knew was
> wrong.
> 
> [...]

Merged, thanks!

https://git.kernel.org/palmer/c/90e0d94d369d

Best regards,
-- 
Palmer Dabbelt <palmer@rivosinc.com>

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