Re: [PATCH v2 7/8] dt-bindings: riscv: Add generic CBQRI controller binding

From: Drew Fustini <fustini@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: "Adrien Ricciardi" <aricciardi@baylibre.com>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Atish Kumar Patra" <atishp@rivosinc.com>,
	"Atish Patra" <atish.patra@linux.dev>,
	"Babu Moger" <babu.moger@amd.com>,
	"Ben Horgan" <ben.horgan@arm.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Chen Pei" <cp0613@linux.alibaba.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Dave Martin" <Dave.Martin@arm.com>,
	"Fenghua Yu" <fenghua.yu@intel.com>,
	"Gong Shuai" <gong.shuai@sanechips.com.cn>,
	"Gong Shuai" <gsh517@gmail.com>,
	guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
	"Kornel Dulęba" <mindal@semihalf.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
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	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
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	"Tony Luck" <tony.luck@intel.com>,
	"Vasudevan Srinivasan" <vasu@rivosinc.com>,
	"Ved Shanbhogue" <ved@rivosinc.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"yunhui cui" <cuiyunhui@bytedance.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	x86@kernel.org, devicetree@vger.kernel.org,
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Subject: Re: [PATCH v2 7/8] dt-bindings: riscv: Add generic CBQRI controller binding
Date: Fri, 26 Jun 2026 09:05:02 -0700	[thread overview]
Message-ID: <aj6jLrECZM18I4MP@thelio> (raw)
In-Reply-To: <20260626-immobile-staining-c825a86bd613@spud>

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On Fri, Jun 26, 2026 at 04:44:56PM +0100, Conor Dooley wrote:
> On Thu, Jun 25, 2026 at 12:21:52PM -0700, Drew Fustini wrote:
> > On Thu, Jun 25, 2026 at 05:19:28PM +0100, Conor Dooley wrote:
> > > On Wed, Jun 24, 2026 at 06:38:35PM -0700, Drew Fustini wrote:
> > > > Document the generic compatibles for capacity and bandwidth controllers
> > > > that implement the RISC-V CBQRI specification. The binding also
> > > > describes the common riscv,cbqri-rcid and riscv,cbqri-mcid properties,
> > > > and the optional riscv,cbqri-cache phandle that links a capacity
> > > > controller to the cache whose capacity it allocates.
> > > > 
> > > > Assisted-by: Claude:claude-opus-4-8
> > > > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > > > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > > > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > > > ---
> > > >  .../devicetree/bindings/riscv/riscv,cbqri.yaml     | 97 ++++++++++++++++++++++
> > > >  MAINTAINERS                                        |  1 +
> > > >  2 files changed, 98 insertions(+)
> > 
> > Thanks for the review.
> > 
> > [..]
> > > > +properties:
> > > > +  compatible:
> > > > +    oneOf:
> > > > +      - items:
> > > > +          - description: Tenstorrent Ascalon Shared Cache
> > > > +            const: tenstorrent,ascalon-sc-cbqri
> > > > +          - const: riscv,cbqri-capacity-controller
> > > > +      - enum:
> > > > +          - riscv,cbqri-capacity-controller
> > > > +          - riscv,cbqri-bandwidth-controller
> > > 
> > > Please modify this, as has been done for other riscv spec related
> > > bindings, to let people get away without using device-specific
> > > compatibles.
> > > 
> > > In this case, you can just delete the first entry from this enum, since
> > > it already has a user and only have to implement this feedback for the
> > > second entry.
> > 
> > Would this work?
> > 
> > properties:
> >   compatible:
> >     oneOf:
> >       - items:
> >           - enum:
> >               - tenstorrent,ascalon-sc-cbqri # Tenstorrent Ascalon Shared Cache
> >           - const: riscv,cbqri-capacity-controller
> >       - items:
> >           - {}
> >           - const: riscv,cbqri-bandwidth-controller
> 
> 
> Should do, yes. I question the need for a comment though, seems pretty
> evident from the compatible what it is.

I was thinking people may not know that 'sc' is the Shared Cache. I
probably should have shortend the comment to 'Ascalon Shared Cache'.
Anyways, I can drop it.

Thanks,
Drew

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