[PATCH v2 0/4] riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter

[PATCH v2 0/4] riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter

[Aurelien Jarno]

This series adds cpu scaling support for the Milk-V Jupiter boards.

The first commit adds it to the existing "Milk-V Jupiter (K1)" board.

The two following commits add a "Milk-V Jupiter (M1)" board, by moving
the common part, i.e. everything but the model name and the operating
point tables, in a shared DTSI file. This file is then included for both
K1 and M1 variants.

CPU frequency scaling was verified up to 1.8 GHz on the M1 board.

Changes v1 -> v2:
 - Collect Reviewed-by tag for patch 1
 - Fix copyright in patch 2
 - Use a different compatible for the M1 board

Aurelien Jarno (4):
  riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter
  riscv: dts: spacemit: Add a common board dtsi for Milk-V Jupiter
    boards
  dt-bindings: riscv: spacemit: add Milk-V Jupiter M1 compatible
  riscv: dts: spacemit: Add Milk-V Jupiter board (M1)

 .../devicetree/bindings/riscv/spacemit.yaml   |   1 +
 arch/riscv/boot/dts/spacemit/Makefile         |   1 +
 .../dts/spacemit/k1-milkv-jupiter-common.dtsi | 468 ++++++++++++++++++
 .../boot/dts/spacemit/k1-milkv-jupiter.dts    | 430 +---------------
 .../boot/dts/spacemit/m1-milkv-jupiter.dts    |  16 +
 arch/riscv/boot/dts/spacemit/m1-opp.dtsi      | 117 +++++
 6 files changed, 606 insertions(+), 427 deletions(-)
 create mode 100644 arch/riscv/boot/dts/spacemit/k1-milkv-jupiter-common.dtsi
 create mode 100644 arch/riscv/boot/dts/spacemit/m1-milkv-jupiter.dts
 create mode 100644 arch/riscv/boot/dts/spacemit/m1-opp.dtsi

-- 
2.53.0


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[PATCH v2 1/4] riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter

[Aurelien Jarno]

Enable CPU DVFS on Milk-V Jupiter by including the OPP tables and wiring the
CPU nodes to the CPU regulator supply.

Reviewed-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 .../boot/dts/spacemit/k1-milkv-jupiter.dts    | 35 ++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index c76b91ecb914d..635e95aad14a5 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -5,6 +5,7 @@
  */
 
 #include "k1.dtsi"
+#include "k1-opp.dtsi"
 #include "k1-pinctrl.dtsi"
 
 / {
@@ -107,6 +108,38 @@ &combo_phy {
 	status = "okay";
 };
 
+&cpu_0 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_1 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_2 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_3 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_4 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_5 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_6 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_7 {
+	cpu-supply = <&buck1_0v9>;
+};
+
 &emmc {
 	bus-width = <8>;
 	mmc-hs400-1_8v;
@@ -209,7 +242,7 @@ pmic@41 {
 		dldoin2-supply = <&buck5>;
 
 		regulators {
-			buck1 {
+			buck1_0v9: buck1 {
 				regulator-min-microvolt = <500000>;
 				regulator-max-microvolt = <1050000>;
 				regulator-ramp-delay = <5000>;
-- 
2.53.0


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[PATCH v2 2/4] riscv: dts: spacemit: Add a common board dtsi for Milk-V Jupiter boards

[Aurelien Jarno]

Add a common board dtsi for use by Milk V-Jupiter board variants. It
excludes the CPU operating-points-v2 tables, which should be included in
the board file.

It will be used for the Milk-V Jupiter M1 board.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 .../dts/spacemit/k1-milkv-jupiter-common.dtsi | 468 ++++++++++++++++++
 .../boot/dts/spacemit/k1-milkv-jupiter.dts    | 461 +----------------
 2 files changed, 470 insertions(+), 459 deletions(-)
 create mode 100644 arch/riscv/boot/dts/spacemit/k1-milkv-jupiter-common.dtsi

diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter-common.dtsi b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter-common.dtsi
new file mode 100644
index 0000000000000..6b90a603cdf6b
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter-common.dtsi
@@ -0,0 +1,468 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
+ * Copyright (C) 2025 Javier Martinez Canillas <javierm@redhat.com>
+ */
+
+#include "k1.dtsi"
+#include "k1-opp.dtsi"
+#include "k1-pinctrl.dtsi"
+
+/ {
+	aliases {
+		ethernet0 = &eth0;
+		ethernet1 = &eth1;
+		i2c2 = &i2c2;
+		i2c8 = &i2c8;
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led1 {
+			label = "pwr-led";
+			gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "default-on";
+			default-state = "on";
+		};
+
+		led2 {
+			label = "hdd-led";
+			gpios = <&gpio K1_GPIO(92) GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "disk-activity";
+		};
+	};
+
+	pcie_vcc_3v3: regulator-pcie-vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "pcie_vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&reg_dc_in>;
+	};
+
+	reg_dc_in: regulator-dc-in-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_in_12v";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_vcc_4v: regulator-vcc-4v {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_4v";
+		regulator-min-microvolt = <4000000>;
+		regulator-max-microvolt = <4000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&reg_dc_in>;
+	};
+
+	reg_vcc_5v: regulator-vcc-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&reg_dc_in>;
+	};
+
+	regulator-usb3-vbus-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "USB30_VBUS";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&reg_vcc_5v>;
+		gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	usb3_hub_5v: regulator-usb3-hub-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "USB30_HUB";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_vcc_5v>;
+		gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&combo_phy {
+	status = "okay";
+};
+
+&cpu_0 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_1 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_2 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_3 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_4 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_5 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_6 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&cpu_7 {
+	cpu-supply = <&buck1_0v9>;
+};
+
+&emmc {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	non-removable;
+	no-sd;
+	no-sdio;
+	status = "okay";
+};
+
+&eth0 {
+	phy-handle = <&rgmii0>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <0>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii0: phy@1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&eth1 {
+	phy-handle = <&rgmii1>;
+	phy-mode = "rgmii-id";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <250>;
+	status = "okay";
+
+	mdio-bus {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+		reset-delay-us = <10000>;
+		reset-post-delay-us = <100000>;
+
+		rgmii1: phy@1 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&pdma {
+	status = "okay";
+};
+
+&i2c2 {
+	pinctrl-0 = <&i2c2_0_cfg>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c04";
+		reg = <0x50>;
+		vcc-supply = <&buck3_1v8>; /* EEPROM_VCC18 */
+		pagesize = <16>;
+		read-only;
+		size = <512>;
+
+		nvmem-layout {
+			compatible = "onie,tlv-layout";
+
+			product-name {
+			};
+		};
+	};
+};
+
+&i2c8 {
+	pinctrl-0 = <&i2c8_cfg>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	pmic@41 {
+		compatible = "spacemit,p1";
+		reg = <0x41>;
+		interrupts = <64>;
+		vin1-supply = <&reg_vcc_4v>;
+		vin2-supply = <&reg_vcc_4v>;
+		vin3-supply = <&reg_vcc_4v>;
+		vin4-supply = <&reg_vcc_4v>;
+		vin5-supply = <&reg_vcc_4v>;
+		vin6-supply = <&reg_vcc_4v>;
+		aldoin-supply = <&reg_vcc_4v>;
+		dldoin1-supply = <&buck5>;
+		dldoin2-supply = <&buck5>;
+
+		regulators {
+			buck1_0v9: buck1 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			buck2 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1050000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			buck3_1v8: buck3 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			buck4_3v3: buck4 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			buck5: buck5 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			buck6 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+				regulator-ramp-delay = <5000>;
+				regulator-always-on;
+			};
+
+			aldo1: aldo1 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+			};
+
+			aldo2 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			aldo3 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			aldo4 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			dldo1 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-boot-on;
+			};
+
+			dldo2 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			dldo3 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			dldo4 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-always-on;
+			};
+
+			dldo5 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			dldo6 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-always-on;
+			};
+
+			dldo7 {
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+		};
+	};
+};
+
+&pcie1_phy {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie1_3_cfg>;
+	status = "okay";
+};
+
+&pcie1_port {
+	phys = <&pcie1_phy>;
+	vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie1 {
+	vpcie3v3-supply = <&pcie_vcc_3v3>;
+	status = "okay";
+};
+
+&pcie2_phy {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie2_4_cfg>;
+	status = "okay";
+};
+
+&pcie2_port {
+	phys = <&pcie2_phy>;
+	vpcie3v3-supply = <&pcie_vcc_3v3>;
+};
+
+&pcie2 {
+	vpcie3v3-supply = <&pcie_vcc_3v3>;
+	status = "okay";
+};
+
+&qspi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&qspi_cfg>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <26500000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <4>;
+		vcc-supply = <&buck4_3v3>; /* QSPI_VCC1833 */
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			bootinfo@0 {
+				reg = <0x0 0x10000>;
+			};
+			private@10000 {
+				reg = <0x10000 0x10000>;
+			};
+			fsbl@20000 {
+				reg = <0x20000 0x40000>;
+			};
+			env@60000 {
+				reg = <0x60000 0x10000>;
+			};
+			opensbi@70000 {
+				reg = <0x70000 0x30000>;
+			};
+			uboot@a0000 {
+				reg = <0xa0000 0x760000>;
+			};
+		};
+	};
+};
+
+&sdhci0 {
+	pinctrl-names = "default", "uhs";
+	pinctrl-0 = <&mmc1_cfg>;
+	pinctrl-1 = <&mmc1_uhs_cfg>;
+	bus-width = <4>;
+	cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	no-mmc;
+	no-sdio;
+	disable-wp;
+	cap-sd-highspeed;
+	vmmc-supply = <&buck4_3v3>;
+	vqmmc-supply = <&aldo1>;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_2_cfg>;
+	status = "okay";
+};
+
+&usbphy2 {
+	status = "okay";
+};
+
+&usb_dwc3 {
+	dr_mode = "host";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	hub_2_0: hub@1 {
+		compatible = "usb2109,2817";
+		reg = <0x1>;
+		vdd-supply = <&usb3_hub_5v>;
+		peer-hub = <&hub_3_0>;
+		reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
+	};
+
+	hub_3_0: hub@2 {
+		compatible = "usb2109,817";
+		reg = <0x2>;
+		vdd-supply = <&usb3_hub_5v>;
+		peer-hub = <&hub_2_0>;
+		reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
+	};
+};
diff --git a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
index 635e95aad14a5..77969b7023f7f 100644
--- a/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
@@ -2,470 +2,13 @@
 /*
  * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
  * Copyright (C) 2025 Javier Martinez Canillas <javierm@redhat.com>
+ * Copyright (C) 2026 Aurelien Jarno <aurelien@aurel32.net>
  */
 
-#include "k1.dtsi"
+#include "k1-milkv-jupiter-common.dtsi"
 #include "k1-opp.dtsi"
-#include "k1-pinctrl.dtsi"
 
 / {
 	model = "Milk-V Jupiter (K1)";
 	compatible = "milkv,jupiter", "spacemit,k1";
-
-	aliases {
-		ethernet0 = &eth0;
-		ethernet1 = &eth1;
-		i2c2 = &i2c2;
-		i2c8 = &i2c8;
-		mmc0 = &emmc;
-		mmc1 = &sdhci0;
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led1 {
-			label = "pwr-led";
-			gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "default-on";
-			default-state = "on";
-		};
-
-		led2 {
-			label = "hdd-led";
-			gpios = <&gpio K1_GPIO(92) GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "disk-activity";
-		};
-	};
-
-	pcie_vcc_3v3: regulator-pcie-vcc3v3 {
-		compatible = "regulator-fixed";
-		regulator-name = "pcie_vcc3v3";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-		regulator-always-on;
-		vin-supply = <&reg_dc_in>;
-	};
-
-	reg_dc_in: regulator-dc-in-12v {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_in_12v";
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	reg_vcc_4v: regulator-vcc-4v {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_4v";
-		regulator-min-microvolt = <4000000>;
-		regulator-max-microvolt = <4000000>;
-		regulator-boot-on;
-		regulator-always-on;
-		vin-supply = <&reg_dc_in>;
-	};
-
-	reg_vcc_5v: regulator-vcc-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_5v";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-boot-on;
-		regulator-always-on;
-		vin-supply = <&reg_dc_in>;
-	};
-
-	regulator-usb3-vbus-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "USB30_VBUS";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-		vin-supply = <&reg_vcc_5v>;
-		gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
-
-	usb3_hub_5v: regulator-usb3-hub-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "USB30_HUB";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&reg_vcc_5v>;
-		gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
-};
-
-&combo_phy {
-	status = "okay";
-};
-
-&cpu_0 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_1 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_2 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_3 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_4 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_5 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_6 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&cpu_7 {
-	cpu-supply = <&buck1_0v9>;
-};
-
-&emmc {
-	bus-width = <8>;
-	mmc-hs400-1_8v;
-	mmc-hs400-enhanced-strobe;
-	non-removable;
-	no-sd;
-	no-sdio;
-	status = "okay";
-};
-
-&eth0 {
-	phy-handle = <&rgmii0>;
-	phy-mode = "rgmii-id";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
-	rx-internal-delay-ps = <0>;
-	tx-internal-delay-ps = <0>;
-	status = "okay";
-
-	mdio-bus {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
-
-		reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
-		reset-delay-us = <10000>;
-		reset-post-delay-us = <100000>;
-
-		rgmii0: phy@1 {
-			reg = <0x1>;
-		};
-	};
-};
-
-&eth1 {
-	phy-handle = <&rgmii1>;
-	phy-mode = "rgmii-id";
-	pinctrl-names = "default";
-	pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
-	rx-internal-delay-ps = <0>;
-	tx-internal-delay-ps = <250>;
-	status = "okay";
-
-	mdio-bus {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
-
-		reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
-		reset-delay-us = <10000>;
-		reset-post-delay-us = <100000>;
-
-		rgmii1: phy@1 {
-			reg = <0x1>;
-		};
-	};
-};
-
-&pdma {
-	status = "okay";
-};
-
-&i2c2 {
-	pinctrl-0 = <&i2c2_0_cfg>;
-	pinctrl-names = "default";
-	status = "okay";
-
-	eeprom@50 {
-		compatible = "atmel,24c04";
-		reg = <0x50>;
-		vcc-supply = <&buck3_1v8>; /* EEPROM_VCC18 */
-		pagesize = <16>;
-		read-only;
-		size = <512>;
-
-		nvmem-layout {
-			compatible = "onie,tlv-layout";
-
-			product-name {
-			};
-		};
-	};
-};
-
-&i2c8 {
-	pinctrl-0 = <&i2c8_cfg>;
-	pinctrl-names = "default";
-	status = "okay";
-
-	pmic@41 {
-		compatible = "spacemit,p1";
-		reg = <0x41>;
-		interrupts = <64>;
-		vin1-supply = <&reg_vcc_4v>;
-		vin2-supply = <&reg_vcc_4v>;
-		vin3-supply = <&reg_vcc_4v>;
-		vin4-supply = <&reg_vcc_4v>;
-		vin5-supply = <&reg_vcc_4v>;
-		vin6-supply = <&reg_vcc_4v>;
-		aldoin-supply = <&reg_vcc_4v>;
-		dldoin1-supply = <&buck5>;
-		dldoin2-supply = <&buck5>;
-
-		regulators {
-			buck1_0v9: buck1 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1050000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			buck2 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1050000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			buck3_1v8: buck3 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			buck4_3v3: buck4 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			buck5: buck5 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3450000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			buck6 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3450000>;
-				regulator-ramp-delay = <5000>;
-				regulator-always-on;
-			};
-
-			aldo1: aldo1 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-				regulator-boot-on;
-			};
-
-			aldo2 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			aldo3 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			aldo4 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			dldo1 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-				regulator-boot-on;
-			};
-
-			dldo2 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			dldo3 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			dldo4 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-				regulator-always-on;
-			};
-
-			dldo5 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-
-			dldo6 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-				regulator-always-on;
-			};
-
-			dldo7 {
-				regulator-min-microvolt = <500000>;
-				regulator-max-microvolt = <3400000>;
-			};
-		};
-	};
-};
-
-&pcie1_phy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie1_3_cfg>;
-	status = "okay";
-};
-
-&pcie1_port {
-	phys = <&pcie1_phy>;
-	vpcie3v3-supply = <&pcie_vcc_3v3>;
-};
-
-&pcie1 {
-	vpcie3v3-supply = <&pcie_vcc_3v3>;
-	status = "okay";
-};
-
-&pcie2_phy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie2_4_cfg>;
-	status = "okay";
-};
-
-&pcie2_port {
-	phys = <&pcie2_phy>;
-	vpcie3v3-supply = <&pcie_vcc_3v3>;
-};
-
-&pcie2 {
-	vpcie3v3-supply = <&pcie_vcc_3v3>;
-	status = "okay";
-};
-
-&qspi {
-	pinctrl-names = "default";
-	pinctrl-0 = <&qspi_cfg>;
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <26500000>;
-		spi-rx-bus-width = <4>;
-		spi-tx-bus-width = <4>;
-		vcc-supply = <&buck4_3v3>; /* QSPI_VCC1833 */
-		m25p,fast-read;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			bootinfo@0 {
-				reg = <0x0 0x10000>;
-			};
-			private@10000 {
-				reg = <0x10000 0x10000>;
-			};
-			fsbl@20000 {
-				reg = <0x20000 0x40000>;
-			};
-			env@60000 {
-				reg = <0x60000 0x10000>;
-			};
-			opensbi@70000 {
-				reg = <0x70000 0x30000>;
-			};
-			uboot@a0000 {
-				reg = <0xa0000 0x760000>;
-			};
-		};
-	};
-};
-
-&sdhci0 {
-	pinctrl-names = "default", "uhs";
-	pinctrl-0 = <&mmc1_cfg>;
-	pinctrl-1 = <&mmc1_uhs_cfg>;
-	bus-width = <4>;
-	cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
-	no-mmc;
-	no-sdio;
-	disable-wp;
-	cap-sd-highspeed;
-	vmmc-supply = <&buck4_3v3>;
-	vqmmc-supply = <&aldo1>;
-	sd-uhs-sdr25;
-	sd-uhs-sdr50;
-	sd-uhs-sdr104;
-	status = "okay";
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_2_cfg>;
-	status = "okay";
-};
-
-&usbphy2 {
-	status = "okay";
-};
-
-&usb_dwc3 {
-	dr_mode = "host";
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-
-	hub_2_0: hub@1 {
-		compatible = "usb2109,2817";
-		reg = <0x1>;
-		vdd-supply = <&usb3_hub_5v>;
-		peer-hub = <&hub_3_0>;
-		reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
-	};
-
-	hub_3_0: hub@2 {
-		compatible = "usb2109,817";
-		reg = <0x2>;
-		vdd-supply = <&usb3_hub_5v>;
-		peer-hub = <&hub_2_0>;
-		reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
-	};
 };
-- 
2.53.0


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[PATCH v2 3/4] dt-bindings: riscv: spacemit: add Milk-V Jupiter M1 compatible

[Aurelien Jarno]

Add a compatible for the M1 version of the Milk-V Jupiter board, which
use a CPU with a different packaging with improved cooling performance.
It enables the CPU to run at up to 1.8 GHz instead of 1.6 GHz.

Note that the K1 vendor kernel doesn't provide any compatible entry for
the boards, so use "milkv,jupiter-m1".

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 Documentation/devicetree/bindings/riscv/spacemit.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/spacemit.yaml b/Documentation/devicetree/bindings/riscv/spacemit.yaml
index 4ee9c88984b4c..aba189b91ae35 100644
--- a/Documentation/devicetree/bindings/riscv/spacemit.yaml
+++ b/Documentation/devicetree/bindings/riscv/spacemit.yaml
@@ -28,6 +28,7 @@ properties:
           - enum:
               - bananapi,bpi-f3
               - milkv,jupiter
+              - milkv,jupiter-m1
               - spacemit,musepi-pro
               - xunlong,orangepi-r2s
               - xunlong,orangepi-rv2
-- 
2.53.0


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[PATCH v2 4/4] riscv: dts: spacemit: Add Milk-V Jupiter board (M1)

[Aurelien Jarno]

Add support for the Milk-V Jupiter board with the M1 CPU. The M1 differs
from the K1 only by its package, which provides improved cooling
performance and allows it to run at up to 1.8 GHz instead of 1.6 GHz.

Add m1-opp.dtsi to define the 1.8 GHz operating point and the
corresponding core voltage, based on the upstream kernel. Include it
from m1-milkv-jupiter.dts. Raise the maximum buck1 voltage to 1.116V to
match the new operating point.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/riscv/boot/dts/spacemit/Makefile         |   1 +
 .../boot/dts/spacemit/m1-milkv-jupiter.dts    |  16 +++
 arch/riscv/boot/dts/spacemit/m1-opp.dtsi      | 117 ++++++++++++++++++
 3 files changed, 134 insertions(+)
 create mode 100644 arch/riscv/boot/dts/spacemit/m1-milkv-jupiter.dts
 create mode 100644 arch/riscv/boot/dts/spacemit/m1-opp.dtsi

diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile
index 851b701e5da48..c5c38c17b6ced 100644
--- a/arch/riscv/boot/dts/spacemit/Makefile
+++ b/arch/riscv/boot/dts/spacemit/Makefile
@@ -8,3 +8,4 @@ dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb
 dtb-$(CONFIG_ARCH_SPACEMIT) += k3-com260-ifx.dtb
 dtb-$(CONFIG_ARCH_SPACEMIT) += k3-deepcomputing-fml13v05.dtb
 dtb-$(CONFIG_ARCH_SPACEMIT) += k3-pico-itx.dtb
+dtb-$(CONFIG_ARCH_SPACEMIT) += m1-milkv-jupiter.dtb
diff --git a/arch/riscv/boot/dts/spacemit/m1-milkv-jupiter.dts b/arch/riscv/boot/dts/spacemit/m1-milkv-jupiter.dts
new file mode 100644
index 0000000000000..b0624d65a17fb
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/m1-milkv-jupiter.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2026 Aurelien Jarno <aurelien@aurel32.net>
+ */
+
+#include "k1-milkv-jupiter-common.dtsi"
+#include "m1-opp.dtsi"
+
+/ {
+	model = "Milk-V Jupiter (M1)";
+	compatible = "milkv,jupiter-m1", "spacemit,k1";
+};
+
+&buck1_0v9 {
+	regulator-max-microvolt = <1160000>;
+};
diff --git a/arch/riscv/boot/dts/spacemit/m1-opp.dtsi b/arch/riscv/boot/dts/spacemit/m1-opp.dtsi
new file mode 100644
index 0000000000000..38e0ce7765a2b
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/m1-opp.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/ {
+	cluster0_opp_table: opp-table-cluster0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-614400000 {
+			opp-hz = /bits/ 64 <614400000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-819000000 {
+			opp-hz = /bits/ 64 <819000000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1228800000 {
+			opp-hz = /bits/ 64 <1228800000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1600000000 {
+			opp-hz = /bits/ 64 <1600000000>;
+			opp-microvolt = <1050000 1050000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1800000000 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1160000 1160000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+	};
+
+	cluster1_opp_table: opp-table-cluster1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-614400000 {
+			opp-hz = /bits/ 64 <614400000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-819000000 {
+			opp-hz = /bits/ 64 <819000000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1228800000 {
+			opp-hz = /bits/ 64 <1228800000>;
+			opp-microvolt = <950000 950000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1600000000 {
+			opp-hz = /bits/ 64 <1600000000>;
+			opp-microvolt = <1050000 1050000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+
+		opp-1800000000 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1160000 1160000 1160000>;
+			clock-latency-ns = <200000>;
+		};
+	};
+};
+
+&cpu_0 {
+	operating-points-v2 = <&cluster0_opp_table>;
+};
+
+&cpu_1 {
+	operating-points-v2 = <&cluster0_opp_table>;
+};
+
+&cpu_2 {
+	operating-points-v2 = <&cluster0_opp_table>;
+};
+
+&cpu_3 {
+	operating-points-v2 = <&cluster0_opp_table>;
+};
+
+&cpu_4 {
+	operating-points-v2 = <&cluster1_opp_table>;
+};
+
+&cpu_5 {
+	operating-points-v2 = <&cluster1_opp_table>;
+};
+
+&cpu_6 {
+	operating-points-v2 = <&cluster1_opp_table>;
+};
+
+&cpu_7 {
+	operating-points-v2 = <&cluster1_opp_table>;
+};
-- 
2.53.0


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Re: [PATCH v2 3/4] dt-bindings: riscv: spacemit: add Milk-V Jupiter M1 compatible

[Krzysztof Kozlowski]

On Wed, Jul 29, 2026 at 06:00:30PM +0200, Aurelien Jarno wrote:
> Add a compatible for the M1 version of the Milk-V Jupiter board, which
> use a CPU with a different packaging with improved cooling performance.
> It enables the CPU to run at up to 1.8 GHz instead of 1.6 GHz.
> 
> Note that the K1 vendor kernel doesn't provide any compatible entry for
> the boards, so use "milkv,jupiter-m1".

Looks like should be compatible with milkv,jupiter as well.

Best regards,
Krzysztof


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Re: [PATCH v2 4/4] riscv: dts: spacemit: Add Milk-V Jupiter board (M1)

[Yixun Lan]

Hi Aurelien, 


On 18:00 Wed 29 Jul     , Aurelien Jarno wrote:
> Add support for the Milk-V Jupiter board with the M1 CPU. The M1 differs
> from the K1 only by its package, which provides improved cooling
> performance and allows it to run at up to 1.8 GHz instead of 1.6 GHz.
> 
> Add m1-opp.dtsi to define the 1.8 GHz operating point and the
> corresponding core voltage, based on the upstream kernel. Include it
> from m1-milkv-jupiter.dts. Raise the maximum buck1 voltage to 1.116V to
> match the new operating point.
> 
While checking the schematics, the buck1,2 provide power supply both
for cpu core and AVDD09 domain - check schematics page 9/25 [1]

the R81 is NC, so buck1,2 is actually all power supply, raise voltage will
result high risk to damage the chip (overvoltage of AVDD09 domain), so
a safe strategy would to test if M1 able to run at 1.8G without voltage 
change (still at 1.05v)?

Link: https://github.com/milkv-jupiter/jupiter-files/blob/main/hardware/v1_0/jupiter-sch-v1_0.pdf [1]

-- 
Yixun Lan (dlan)

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Re: [PATCH v2 3/4] dt-bindings: riscv: spacemit: add Milk-V Jupiter M1 compatible

[Aurelien Jarno]

On 2026-07-30 09:26, Krzysztof Kozlowski wrote:
> On Wed, Jul 29, 2026 at 06:00:30PM +0200, Aurelien Jarno wrote:
> > Add a compatible for the M1 version of the Milk-V Jupiter board, which
> > use a CPU with a different packaging with improved cooling performance.
> > It enables the CPU to run at up to 1.8 GHz instead of 1.6 GHz.
> > 
> > Note that the K1 vendor kernel doesn't provide any compatible entry for
> > the boards, so use "milkv,jupiter-m1".
> 
> Looks like should be compatible with milkv,jupiter as well.

You are correct, I'll fix that in v3.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                     http://aurel32.net

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Re: [PATCH v2 4/4] riscv: dts: spacemit: Add Milk-V Jupiter board (M1)

[Aurelien Jarno]

Hi Yixun,

On 2026-07-30 08:54, Yixun Lan wrote:
> Hi Aurelien, 
> 
> 
> On 18:00 Wed 29 Jul     , Aurelien Jarno wrote:
> > Add support for the Milk-V Jupiter board with the M1 CPU. The M1 differs
> > from the K1 only by its package, which provides improved cooling
> > performance and allows it to run at up to 1.8 GHz instead of 1.6 GHz.
> > 
> > Add m1-opp.dtsi to define the 1.8 GHz operating point and the
> > corresponding core voltage, based on the upstream kernel. Include it
> > from m1-milkv-jupiter.dts. Raise the maximum buck1 voltage to 1.116V to
> > match the new operating point.
> > 
> While checking the schematics, the buck1,2 provide power supply both
> for cpu core and AVDD09 domain - check schematics page 9/25 [1]
> 
> the R81 is NC, so buck1,2 is actually all power supply, raise voltage will
> result high risk to damage the chip (overvoltage of AVDD09 domain), so

Yes, both buck1 and buck2 supply the CPU core. I only raised buck1 here, 
because it's the only one controlled by the cpu scaling, but in practice 
I believe that configuring the PMIC as Dual-Phase Mode couple the two 
regulator at the hardware level and only the first one need to be set. 
See my analysis there:
https://lore.kernel.org/spacemit/178402025712.1568061.9223355686030414906.b4-ty@b4/T/#m828e80aaf454606baafbd43e3795089ba397145f

But I can indeed raise both values for consistency.

> a safe strategy would to test if M1 able to run at 1.8G without voltage 
> change (still at 1.05v)?

I'll try that, but my guess is that given the vendor kernel raises the 
voltage to 1.116V, it is actually needed.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                     http://aurel32.net

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Re: [PATCH v2 4/4] riscv: dts: spacemit: Add Milk-V Jupiter board (M1)

[Yixun Lan]

Hi Aurelien,

On 12:13 Thu 30 Jul     , Aurelien Jarno wrote:
> Hi Yixun,
> 
> On 2026-07-30 08:54, Yixun Lan wrote:
> > Hi Aurelien, 
> > 
> > 
> > On 18:00 Wed 29 Jul     , Aurelien Jarno wrote:
> > > Add support for the Milk-V Jupiter board with the M1 CPU. The M1 differs
> > > from the K1 only by its package, which provides improved cooling
> > > performance and allows it to run at up to 1.8 GHz instead of 1.6 GHz.
> > > 
> > > Add m1-opp.dtsi to define the 1.8 GHz operating point and the
> > > corresponding core voltage, based on the upstream kernel. Include it
> > > from m1-milkv-jupiter.dts. Raise the maximum buck1 voltage to 1.116V to
> > > match the new operating point.
> > > 
> > While checking the schematics, the buck1,2 provide power supply both
> > for cpu core and AVDD09 domain - check schematics page 9/25 [1]
> > 
> > the R81 is NC, so buck1,2 is actually all power supply, raise voltage will
> > result high risk to damage the chip (overvoltage of AVDD09 domain), so
> 
> Yes, both buck1 and buck2 supply the CPU core. I only raised buck1 here, 
> because it's the only one controlled by the cpu scaling, but in practice 
> I believe that configuring the PMIC as Dual-Phase Mode couple the two 
> regulator at the hardware level and only the first one need to be set. 
> See my analysis there:
> https://lore.kernel.org/spacemit/178402025712.1568061.9223355686030414906.b4-ty@b4/T/#m828e80aaf454606baafbd43e3795089ba397145f
> 
Your anylsis is correct, and that's not the problem I'm talking about..

what I mean is that more than one cumsumers to buck12, where AVDD may not
be able to tolerate high voltage, even vendor can't guarantee to run stably,
vendor kernel enable 1.8GHz as turbo-mode which won't run for long duration.

https://github.com/spacemit-com/linux-6.6/blob/k1-bl-v2.2.y/arch/riscv/boot/dts/spacemit/k1-x_opp_table.dtsi#L20

 buck1,2 |--> CPU CORE
         |--> AVDD09 (DDR, AFEAP ..)

> But I can indeed raise both values for consistency.
> 
> > a safe strategy would to test if M1 able to run at 1.8G without voltage 
> > change (still at 1.05v)?
> 
> I'll try that, but my guess is that given the vendor kernel raises the 
> voltage to 1.116V, it is actually needed.
> 
> Regards
> Aurelien
> 
> -- 
> Aurelien Jarno                          GPG: 4096R/1DDD8C9B
> aurelien@aurel32.net                     http://aurel32.net

-- 
Yixun Lan (dlan)

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