* [PATCH] drivers/perf: riscv: handle legacy fallback in event check
@ 2026-07-10 10:08 Sergey Matyukevich
2026-07-31 16:35 ` Will Deacon
0 siblings, 1 reply; 2+ messages in thread
From: Sergey Matyukevich @ 2026-07-10 10:08 UTC (permalink / raw)
To: linux-riscv, linux-kernel, linux-perf-users
Cc: Paul Walmsley, Palmer Dabbelt, Alexandre Ghiti, Atish Patra,
Anup Patel, Will Deacon, Mark Rutland, Sergey Matyukevich
Common events PERF_COUNT_HW_CPU_CYCLES and PERF_COUNT_HW_INSTRUCTIONS
can fall back to the legacy counters. So do not mark them as invalid
if OpenSBI reports that they are not mapped to sampling counters
in PMU DT node.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
---
drivers/perf/riscv_pmu_sbi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index dfc886dee5ad..8f7aa71dc96f 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -335,7 +335,8 @@ static int pmu_sbi_check_event_info(void)
goto free_mem;
}
- for (i = 0; i < ARRAY_SIZE(pmu_hw_event_map); i++) {
+ /* skip check for cycles and instructions as they can fall back to legacy counters */
+ for (i = 2; i < ARRAY_SIZE(pmu_hw_event_map); i++) {
if (!(event_info_shmem[i].output & RISCV_PMU_EVENT_INFO_OUTPUT_MASK))
pmu_hw_event_map[i].event_idx = -ENOENT;
}
base-commit: a635d6748234582ea287c5ffeae28b9b23f91c7e
--
2.54.0
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drivers/perf: riscv: handle legacy fallback in event check
2026-07-10 10:08 [PATCH] drivers/perf: riscv: handle legacy fallback in event check Sergey Matyukevich
@ 2026-07-31 16:35 ` Will Deacon
0 siblings, 0 replies; 2+ messages in thread
From: Will Deacon @ 2026-07-31 16:35 UTC (permalink / raw)
To: Sergey Matyukevich
Cc: linux-riscv, linux-kernel, linux-perf-users, Paul Walmsley,
Palmer Dabbelt, Alexandre Ghiti, Atish Patra, Anup Patel,
Mark Rutland
On Fri, Jul 10, 2026 at 01:08:35PM +0300, Sergey Matyukevich wrote:
> Common events PERF_COUNT_HW_CPU_CYCLES and PERF_COUNT_HW_INSTRUCTIONS
> can fall back to the legacy counters. So do not mark them as invalid
> if OpenSBI reports that they are not mapped to sampling counters
> in PMU DT node.
>
> Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
> ---
> drivers/perf/riscv_pmu_sbi.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index dfc886dee5ad..8f7aa71dc96f 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -335,7 +335,8 @@ static int pmu_sbi_check_event_info(void)
> goto free_mem;
> }
>
> - for (i = 0; i < ARRAY_SIZE(pmu_hw_event_map); i++) {
> + /* skip check for cycles and instructions as they can fall back to legacy counters */
> + for (i = 2; i < ARRAY_SIZE(pmu_hw_event_map); i++) {
> if (!(event_info_shmem[i].output & RISCV_PMU_EVENT_INFO_OUTPUT_MASK))
> pmu_hw_event_map[i].event_idx = -ENOENT;
> }
I'm assuming the riscv tree are handling perf patches to the riscv driver,
but please shout if not.
Will
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