* [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
@ 2026-10-14 10:20 Geert Uytterhoeven
2026-10-14 23:28 ` Jisheng Zhang
0 siblings, 1 reply; 5+ messages in thread
From: Geert Uytterhoeven @ 2026-10-14 10:20 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Jisheng Zhang, Conor Dooley
Cc: linux-riscv, linux-kernel, Geert Uytterhoeven
These options are irreleant for nommu systems.
Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/riscv/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 15f6e67c60410a87..15beeb4690aebcc4 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
config RISCV_ISA_SV48
bool "Page-Based 48-bit Virtual-Memory System"
- depends on 64BIT
+ depends on 64BIT && MMU
default y
help
Add support for the Page-Based 48-bit Virtual-Memory System.
@@ -617,7 +617,7 @@ config RISCV_ISA_SV48
config RISCV_ISA_SV57
bool "Page-Based 57-bit Virtual-Memory System"
- depends on 64BIT
+ depends on 64BIT && MMU
default y
help
Add support for the Page-Based 57-bit Virtual-Memory System.
--
2.43.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
2026-10-14 10:20 [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU Geert Uytterhoeven
@ 2026-10-14 23:28 ` Jisheng Zhang
2026-10-15 7:43 ` Geert Uytterhoeven
0 siblings, 1 reply; 5+ messages in thread
From: Jisheng Zhang @ 2026-10-14 23:28 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Conor Dooley, linux-riscv, linux-kernel
On Wed, Oct 14, 2026 at 12:20:39PM +0200, Geert Uytterhoeven wrote:
> These options are irreleant for nommu systems.
>
> Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/riscv/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 15f6e67c60410a87..15beeb4690aebcc4 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
>
> config RISCV_ISA_SV48
> bool "Page-Based 48-bit Virtual-Memory System"
> - depends on 64BIT
> + depends on 64BIT && MMU
> default y
> help
> Add support for the Page-Based 48-bit Virtual-Memory System.
> @@ -617,7 +617,7 @@ config RISCV_ISA_SV48
>
> config RISCV_ISA_SV57
> bool "Page-Based 57-bit Virtual-Memory System"
> - depends on 64BIT
> + depends on 64BIT && MMU
hmm, I think we also need to make RISCV_ISA_SV57 depend on
RISCV_ISA_SV48. Otherwise, there's a case: RISCV_ISA_SV57 &&
!RISCV_ISA_SV48. Human won't make this wrong combination, but
the random config can.
with that change,
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> default y
> help
> Add support for the Page-Based 57-bit Virtual-Memory System.
> --
> 2.43.0
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
2026-10-14 23:28 ` Jisheng Zhang
@ 2026-10-15 7:43 ` Geert Uytterhoeven
2026-10-15 11:48 ` Jisheng Zhang
0 siblings, 1 reply; 5+ messages in thread
From: Geert Uytterhoeven @ 2026-10-15 7:43 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Conor Dooley, linux-riscv, linux-kernel
Hi Jisheng,
On Thu, 15 Oct 2026 at 01:48, Jisheng Zhang <jszhang@kernel.org> wrote:
> On Wed, Oct 14, 2026 at 12:20:39PM +0200, Geert Uytterhoeven wrote:
> > These options are irreleant for nommu systems.
> >
> > Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
> >
> > config RISCV_ISA_SV48
> > bool "Page-Based 48-bit Virtual-Memory System"
> > - depends on 64BIT
> > + depends on 64BIT && MMU
> > default y
> > help
> > Add support for the Page-Based 48-bit Virtual-Memory System.
> > @@ -617,7 +617,7 @@ config RISCV_ISA_SV48
> >
> > config RISCV_ISA_SV57
> > bool "Page-Based 57-bit Virtual-Memory System"
> > - depends on 64BIT
> > + depends on 64BIT && MMU
>
> hmm, I think we also need to make RISCV_ISA_SV57 depend on
> RISCV_ISA_SV48. Otherwise, there's a case: RISCV_ISA_SV57 &&
> !RISCV_ISA_SV48. Human won't make this wrong combination, but
> the random config can.
Is that really an issue?
If I build a kernel for an SV57-system, do I really need to enable
support for SV48, too? It builds fine without...
> with that change,
> Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
2026-10-15 7:43 ` Geert Uytterhoeven
@ 2026-10-15 11:48 ` Jisheng Zhang
2026-10-15 12:24 ` Geert Uytterhoeven
0 siblings, 1 reply; 5+ messages in thread
From: Jisheng Zhang @ 2026-10-15 11:48 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Conor Dooley, linux-riscv, linux-kernel
On Thu, Oct 15, 2026 at 09:43:40AM +0200, Geert Uytterhoeven wrote:
> Hi Jisheng,
>
> On Thu, 15 Oct 2026 at 01:48, Jisheng Zhang <jszhang@kernel.org> wrote:
> > On Wed, Oct 14, 2026 at 12:20:39PM +0200, Geert Uytterhoeven wrote:
> > > These options are irreleant for nommu systems.
> > >
> > > Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
> > >
> > > config RISCV_ISA_SV48
> > > bool "Page-Based 48-bit Virtual-Memory System"
> > > - depends on 64BIT
> > > + depends on 64BIT && MMU
> > > default y
> > > help
> > > Add support for the Page-Based 48-bit Virtual-Memory System.
> > > @@ -617,7 +617,7 @@ config RISCV_ISA_SV48
> > >
> > > config RISCV_ISA_SV57
> > > bool "Page-Based 57-bit Virtual-Memory System"
> > > - depends on 64BIT
> > > + depends on 64BIT && MMU
> >
> > hmm, I think we also need to make RISCV_ISA_SV57 depend on
> > RISCV_ISA_SV48. Otherwise, there's a case: RISCV_ISA_SV57 &&
> > !RISCV_ISA_SV48. Human won't make this wrong combination, but
> > the random config can.
>
> Is that really an issue?
> If I build a kernel for an SV57-system, do I really need to enable
> support for SV48, too? It builds fine without...
This is to align with the spec:
"implementations that support Sv57 must also support Sv48"
>
> > with that change,
> > Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
>
> Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU
2026-10-15 11:48 ` Jisheng Zhang
@ 2026-10-15 12:24 ` Geert Uytterhoeven
0 siblings, 0 replies; 5+ messages in thread
From: Geert Uytterhoeven @ 2026-10-15 12:24 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Conor Dooley, linux-riscv, linux-kernel
Hi Jisheng,
On Thu, 15 Oct 2026 at 14:08, Jisheng Zhang <jszhang@kernel.org> wrote:
> On Thu, Oct 15, 2026 at 09:43:40AM +0200, Geert Uytterhoeven wrote:
> > On Thu, 15 Oct 2026 at 01:48, Jisheng Zhang <jszhang@kernel.org> wrote:
> > > On Wed, Oct 14, 2026 at 12:20:39PM +0200, Geert Uytterhoeven wrote:
> > > > These options are irreleant for nommu systems.
> > > >
> > > > Fixes: 36de74049ec8cb1a ("riscv: introduce RISCV_ISA_SV48 and RISCV_ISA_SV57")
> > > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > > > --- a/arch/riscv/Kconfig
> > > > +++ b/arch/riscv/Kconfig
> > > > @@ -605,7 +605,7 @@ config RISCV_ISA_SSQOSID
> > > >
> > > > config RISCV_ISA_SV48
> > > > bool "Page-Based 48-bit Virtual-Memory System"
> > > > - depends on 64BIT
> > > > + depends on 64BIT && MMU
> > > > default y
> > > > help
> > > > Add support for the Page-Based 48-bit Virtual-Memory System.
> > > > @@ -617,7 +617,7 @@ config RISCV_ISA_SV48
> > > >
> > > > config RISCV_ISA_SV57
> > > > bool "Page-Based 57-bit Virtual-Memory System"
> > > > - depends on 64BIT
> > > > + depends on 64BIT && MMU
> > >
> > > hmm, I think we also need to make RISCV_ISA_SV57 depend on
> > > RISCV_ISA_SV48. Otherwise, there's a case: RISCV_ISA_SV57 &&
> > > !RISCV_ISA_SV48. Human won't make this wrong combination, but
> > > the random config can.
> >
> > Is that really an issue?
> > If I build a kernel for an SV57-system, do I really need to enable
> > support for SV48, too? It builds fine without...
>
> This is to align with the spec:
> "implementations that support Sv57 must also support Sv48"
IMO that is something different.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-10-15 12:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-14 10:20 [PATCH] riscv: RISCV_ISA_SV48 and RISCV_ISA_SV57 should depend on MMU Geert Uytterhoeven
2026-10-14 23:28 ` Jisheng Zhang
2026-10-15 7:43 ` Geert Uytterhoeven
2026-10-15 11:48 ` Jisheng Zhang
2026-10-15 12:24 ` Geert Uytterhoeven
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox