From: Jisheng Zhang <jszhang@kernel.org>
To: Andy Chiu <tchiu@tenstorrent.com>
Cc: Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
linux-riscv@lists.infradead.org, mpe@oss.tenstorrent.com,
andybnac@gmail.com, Anton Blanchard <antonb@tenstorrent.com>,
Nicholas Piggin <npiggin@oss.tenstorrent.com>,
dfustini@oss.tenstorrent.com, greentime.hu@sifive.com
Subject: Re: [PATCH v1] riscv: irqflags: Conditionally enable interrupts in arch_local_irq_restore()
Date: Wed, 11 Nov 2026 12:05:08 +0800 [thread overview]
Message-ID: <avPpdL_iZhiU4b08@xhacker> (raw)
In-Reply-To: <20261110225040.1146439-1-tchiu@tenstorrent.com>
On Tue, Nov 10, 2026 at 04:50:38PM -0600, Andy Chiu wrote:
> From: Anton Blanchard <antonb@tenstorrent.com>
>
> The Tenstorrent Ascalon core has an optimization that reduces pipeline
> synchronisation for immediate writes of SIE. This optimization does not
> work with register-based CSR writes, which occur when restoring flags in
> arch_local_irq_restore().
>
> Refactor arch_local_irq_restore() to conditionally call
> arch_local_irq_enable() only when saved flags indicate interrupts were
> enabled.
>
> On a simple nginx benchmark serving a small static HTML file this patch
> improves performance by 4%.
>
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
> Co-developed-by: Nicholas Piggin <npiggin@oss.tenstorrent.com>
> Signed-off-by: Nicholas Piggin <npiggin@oss.tenstorrent.com>
> Signed-off-by: Andy Chiu <tchiu@tenstorrent.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> arch/riscv/include/asm/irqflags.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h
> index 6fd8cbfcfcc7..5b1bca17bdc4 100644
> --- a/arch/riscv/include/asm/irqflags.h
> +++ b/arch/riscv/include/asm/irqflags.h
> @@ -48,7 +48,8 @@ static inline int arch_irqs_disabled(void)
> /* set interrupt enabled status */
> static inline void arch_local_irq_restore(unsigned long flags)
> {
> - csr_set(CSR_STATUS, flags & SR_IE);
> + if (!arch_irqs_disabled_flags(flags))
> + arch_local_irq_enable();
> }
>
> #endif /* _ASM_RISCV_IRQFLAGS_H */
>
> base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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prev parent reply other threads:[~2026-11-11 4:25 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 22:50 [PATCH v1] riscv: irqflags: Conditionally enable interrupts in arch_local_irq_restore() Andy Chiu
2026-11-11 4:05 ` Jisheng Zhang [this message]
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