From: Conor Dooley <conor@kernel.org>
To: Elaine Zhang <zhangqing@rock-chips.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
kever.yang@rock-chips.com, heiko@sntech.de, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, huangtao@rock-chips.com,
andy.yan@rock-chips.com
Subject: Re: [PATCH v5 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id
Date: Wed, 8 Nov 2023 12:01:51 +0000 [thread overview]
Message-ID: <20231108-donation-uncertain-c4d0f560c420@spud> (raw)
In-Reply-To: <20231108061822.4871-4-zhangqing@rock-chips.com>
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On Wed, Nov 08, 2023 at 02:18:21PM +0800, Elaine Zhang wrote:
> export PCLK_VO1GRF for DT.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
> include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> index 5790b1391201..50ba72980190 100644
> --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
> +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> @@ -733,8 +733,9 @@
> #define ACLK_AV1_PRE 718
> #define PCLK_AV1_PRE 719
> #define HCLK_SDIO_PRE 720
> +#define PCLK_VO1GRF 721
>
> -#define CLK_NR_CLKS (HCLK_SDIO_PRE + 1)
> +#define CLK_NR_CLKS (PCLK_VO1GRF + 1)
This definition is part of the ABI, if it is safe to change it, then it
is safe to delete it.
>
> /* scmi-clocks indices */
>
> --
> 2.17.1
>
>
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next prev parent reply other threads:[~2023-11-08 12:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-08 6:18 [PATCH v5 0/4] rockchip: add GATE_LINK Elaine Zhang
2023-11-08 6:18 ` [PATCH v5 1/4] clk: gate: export clk_gate_endisable Elaine Zhang
2023-11-08 6:18 ` [PATCH v5 2/4] clk: rockchip: add support for gate link Elaine Zhang
2023-11-08 6:18 ` [PATCH v5 3/4] dt-bindings: clock: rk3588: export PCLK_VO1GRF clk id Elaine Zhang
2023-11-08 12:01 ` Conor Dooley [this message]
2023-11-08 12:12 ` Krzysztof Kozlowski
2023-11-09 6:27 ` zhangqing
2023-11-09 7:29 ` Conor Dooley
2023-11-09 8:06 ` zhangqing
2023-11-09 9:21 ` Krzysztof Kozlowski
2023-11-09 10:05 ` zhangqing
2023-11-09 10:24 ` Krzysztof Kozlowski
2023-11-10 1:23 ` zhangqing
2023-11-10 18:07 ` Conor Dooley
2023-11-08 6:18 ` [PATCH v5 4/4] clk: rockchip: rk3588: Adjust the GATE_LINK parameter Elaine Zhang
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