From: Igor Paunovic <royalnet026@gmail.com>
To: Jiaxing Hu <gahing@gahingwoo.com>
Cc: "Tomeu Vizoso" <tomeu@tomeuvizoso.net>,
"Heiko Stuebner" <heiko@sntech.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Joerg Roedel" <joro@8bytes.org>, "Will Deacon" <will@kernel.org>,
"Robin Murphy" <robin.murphy@arm.com>,
"Ulf Hansson" <ulfh@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Oded Gabbay" <ogabbay@kernel.org>,
"Elaine Zhang" <zhangqing@rock-chips.com>,
"Abel Vesa" <abel.vesa@oss.qualcomm.com>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Sidong Yang" <sidong.yang@furiosa.ai>,
"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
"Chaoyi Chen" <chaoyi.chen@rock-chips.com>,
"Diederik de Haas" <diederik@cknow-tech.com>,
"Alexey Charkov" <alchark@flipper.net>,
dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org, iommu@lists.linux.dev,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Igor Paunovic" <royalnet026@gmail.com>
Subject: Re: [PATCH v12 03/14] accel/rocket: wait for a running IRQ handler before resetting a core
Date: Sat, 12 Sep 2026 13:37:17 +0200 [thread overview]
Message-ID: <20260912113717.6819-1-royalnet026@gmail.com> (raw)
In-Reply-To: <20260912065053.1519165-4-gahing@gahingwoo.com>
Hi Jiaxing,
While re-running the 19 August protocol on v12 as posted today, I
found an error in my own reports that this commit message now
carries. It is mine to correct, and it also corrects yesterday's mail
[1]. What falls from that mail: the 53-versus-49 bound, the sentence
that 19 August showed no manifestation on either arm, and the closing
suggestion that both statements can stand in the commit message. What
stands: the provenance, 45 resets on 19 August on v8 1-2/12 and 102
on 25 August on v9, and the caveat that this protocol bounds and does
not prove.
My script kept the scorer output of every inference per round and
never aggregated it; my summaries scored only the one inference after
the forced autosuspend. Aggregating the per-round files now, the
constant-0x80 result is in the rounds of nearly every run, on every
arm, on all three dates (resets per run, then rounds at 0x80):
19 Aug v8 1+2 12 + 8 2 + 1
19 Aug base only 12 + 13 2 + 3
25 Aug v9 1+2 12 + 11 6 + 1
25 Aug base only 8/10/12/8/15 2/0/1/1/2 (+ the one after
suspend)
25 Aug v9 1+2+3 13 + 13 2 + 2
12 Sep v12 2+3 10 + 11 2 + 0
12 Sep v12 2+3+4 9/5/12/13/14 2/0/2/1/1 (+ the one after
suspend, twice)
Today's seven runs were two arms only, no unpatched arm, so nothing
today re-tests the differential. Same board and base as before,
PROVE_LOCKING and DEBUG_ATOMIC_SLEEP on, serial console captured on a
second machine for the whole session.
So "no manifestation on either arm, oracle 48/48 throughout" on 19
August and "every inference matched" on 25 August were both wrong
for the in-round inferences, and the 0x80 buffer is not a
differential signal. It is what a job cancelled by the reset looks
like from userspace in this protocol, whatever made the job miss its
deadline, so it cannot tell the races 2/14 and 3/14 close from an
ordinary induced timeout.
The mechanism, from the code: rocket_reset() calls drm_sched_stop(),
which detaches the hardware fence of every pending job that has not
completed; rocket_core_reset() kills the block; drm_sched_start(sched,
0) then completes those jobs through drm_sched_job_done(job,
-ECANCELED). That finished fence is the one on the output BO's
reservation. The only wait the rocket uAPI offers is
DRM_IOCTL_ROCKET_PREP_BO, and rocket_gem.c maps any positive return
of dma_resv_wait_timeout() to 0, error or not, so teflon reads an
output buffer that was never written, which its output conversion
turns into 0x80 (mesa rkt_ml.c, output + 0x80), exactly as you
described for RK3576. With JOB_TIMEOUT_MS=2 the timeout fires on
about half the inferences (74 timeouts over the 147 inferences run
today, seven runs of twenty-one; 14 of the 21 in the traced run
below); whether the reset or the completion wins that race decides
the outcome, on every arm alike.
A direct witness, one run on v12 2+3+4 today with a kprobe on
drm_sched_fence_finished(): exactly two completions in the whole run
carried result -125 (-ECANCELED), and exactly two inferences came
back all-0x80, round 11 and the post-suspend one. The two
cancellations are 5.3062 s apart and the two scorer files 5.3057 s
apart, and across all twenty-one inferences of the run the gap
between a traced completion and the scorer file it produced is
constant to within 2 ms, against a round period of 280 ms, so each
cancellation falls unambiguously in the round that came back at
0x80. In the other runs I have only the scorer output, which took
exactly two values today (all 48 channels within 1 of the CPU
reference, or all-0x80, nothing in between), so there the
identification of the 0x80 results as cancelled jobs is inference,
not observation.
For this commit message I would drop the two paragraphs that cite my
runs as evidence for the race: the one beginning "Igor also ran a
differential on RK3588" and the one beginning "His own bound on it is
the right one", and put this in their place: 45 induced resets on 19
August, 102 on 25 August and 74 today, every reset recovered, no MMU
faults, no lockdep report from rocket or the scheduler in the runs
where lockdep was still armed, and of the 420 inferences scored, 384
matched the CPU reference within 1 on all 48 output channels while 36
returned the all-0x80 buffer of a job the reset had cancelled. Please
keep both Link: lines and add this message as a third, so anyone
following the 19 and 25 August reports lands on the correction too.
Two things I should have said before: all of those resets landed on
core 0 (fdab0000), the other two cores being bound but idle in this
single-client protocol; and two of today's five 2+3+4 runs come from
a boot that had an unrelated lockdep splat in the DP driver at probe
time, before the test, so they carry no PROVE_LOCKING cover. The
Tested-by lines on 2/14, 3/14 and 4/14 stand for that and only that.
On 3/14 please drop "differential base" from my tag comment, which
then reads exactly like the one on 4/14; and on 2/14, where the
comment is only "# RK3588, three cores", please give it the same
comment as 4/14, since the lowered timeout belongs on every tag that
came out of this protocol.
One question this leaves, mostly for Tomeu: there is no out-fence or
status field in the rocket uAPI, and PREP_BO drops the fence error,
so a job cancelled by a reset is indistinguishable from one that ran
(rocket_job_run() reads the error, but only to return NULL instead of
executing the job). Is that intended?
The artifacts of all twenty runs (scorer output per round, runtime
and genpd state, journal, serial log, today's kprobe trace) are
preserved if you or Tomeu want them.
[1] https://lore.kernel.org/all/20260911192833.105634-1-royalnet026@gmail.com/
Regards,
Igor
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next prev parent reply other threads:[~2026-09-12 11:38 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-12 6:50 [PATCH v12 00/14] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 01/14] accel/rocket: request the core clocks by name Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 02/14] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 03/14] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-09-12 11:37 ` Igor Paunovic [this message]
2026-09-12 22:48 ` Jiaxing Hu
2026-09-13 0:13 ` Igor Paunovic
2026-09-12 6:50 ` [PATCH v12 04/14] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 05/14] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 06/14] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 07/14] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 08/14] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 09/14] pmdomain: rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 10/14] pmdomain: rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 11/14] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 12/14] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 13/14] arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576 Jiaxing Hu
2026-09-12 6:50 ` [PATCH v12 14/14] arm64: dts: rockchip: enable the NPU on rk3576-rock-4d Jiaxing Hu
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