* [PATCH v2 0/3] arm64: dts: rockchip: Add support for Axelera Embedded 111c
@ 2026-10-20 11:37 Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 1/3] dt-bindings: vendor-prefixes: Add Axelera AI Patrick Barsanti
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Patrick Barsanti @ 2026-10-20 11:37 UTC (permalink / raw)
To: devicetree, linux-rockchip, linux-kernel, heiko, robh, krzk+dt,
conor+dt
Cc: linux-amarula, michael, dario.binacchi, Patrick Barsanti
The Axelera Embedded 111c is an SBC based on the Rockchip RK3588
SoC. It offers efficient AI compute for multi-stream computer vision and
generative AI applications in a compact design.
Product page [1].
This series aims to introduce basic support for the board,
which includes the console, the eMMC, the two Gigabit Ethernet ports,
the four USB ports and the HDMI connector.
Changes in v2:
- The board was renamed by Axelera between v1 and v2, from "Metis
Compute Board" to "Embedded 111c". Address the name change. Drop
Conor's Acked-by on the bindings, since the compatible changed. Keep
it on the vendor-prefix.
- Address Heiko's comment about regulator node names starting with
"regulator-".
- Address Heiko's comment about non-existent "mem-supply" binding.
- Address Heiko's comment about dropping the unneeded "Use rgmii-rxid
mode to disable rx delay inside Soc" comment; checkpatch complains
about uncommented rgmii-rxid, so take the one from
rk3588-youyeetoo-yy3588.
- Address Heiko's comment about reset lines of the phy nodes being
incorrectly described in the gmac node; note that these are still not
described in the phy node because GPIO3_B7 defaults to pull-down,
which causes the rgmii_phy1 node to never come up; rgmii_phy0's
reset GPIO, GPIO4_B3, defaults to pull-up, so that node does not
encounter the same issue. Moving the reset to the parent mdio node
instead did the trick.
- Address Sashiko's high severity comment about hdmi0 node mixing M0 and
M1 pinmux groups; use the existing hdmim1_tx0_hpd pinctrl group
instead of redefining it. HPD is wired to M1 while CEC and DDC use the
M0 pins. Verified hot-plug detection on external display.
- Address Sashiko's medium comment about "full-pwr-cycle-in-suspend" and
missing "vmmc-supply" and "vqmmc-supply" on the eMMC node; drop the
former, add the latter two.
- Address Sashiko's medium comment about the pmic node lacking a pinctrl
assignment for the interrupt pin; add it.
- Address Sashiko's medium comment about the "vcc3v3_hubreset" regulator
hack; describe the two GL3523 hubs linked with peer-hub.
- Address Sashiko's low comment about defined-but-never-referenced
regulators without regulator-always-on property; drop them, alongside
their pinctrls.
- Mux PCIEX4_PERST_N as GPIO, to match it being used via reset-gpios.
- Drop the unused input.h include.
- Drop the unused rtc label.
- Drop the local PCIe x1 pinctrl groups, which duplicated the
pcie30x1m1_1_* groups in rk3588-base-pinctrl.dtsi.
Link to v1: [2].
[1]: https://axelera.ai/axelera-products/embedded/111c
[2]: https://lore.kernel.org/r/20260522174918.61523-1-patrick.barsanti@amarulasolutions.com
Patrick Barsanti (3):
dt-bindings: vendor-prefixes: Add Axelera AI
dt-bindings: arm: rockchip: Add Axelera Embedded 111c
arm64: dts: rockchip: Add Axelera Embedded 111c
.../devicetree/bindings/arm/rockchip.yaml | 5 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3588-embedded-111c.dts | 816 ++++++++++++++++++
4 files changed, 824 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-embedded-111c.dts
--
2.53.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2 1/3] dt-bindings: vendor-prefixes: Add Axelera AI
2026-10-20 11:37 [PATCH v2 0/3] arm64: dts: rockchip: Add support for Axelera Embedded 111c Patrick Barsanti
@ 2026-10-20 11:37 ` Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 2/3] dt-bindings: arm: rockchip: Add Axelera Embedded 111c Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 3/3] arm64: dts: " Patrick Barsanti
2 siblings, 0 replies; 4+ messages in thread
From: Patrick Barsanti @ 2026-10-20 11:37 UTC (permalink / raw)
To: devicetree, linux-rockchip, linux-kernel, heiko, robh, krzk+dt,
conor+dt
Cc: linux-amarula, michael, dario.binacchi, Patrick Barsanti,
Conor Dooley
Axelera AI is an EU-based provider of AIPUs for edge AI inference.
Link: https://axelera.ai/
Signed-off-by: Patrick Barsanti <patrick.barsanti@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes in v2:
- Change name to "Axelera AI B.V."
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index ba2002969373..1267d9e2d859 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -219,6 +219,8 @@ patternProperties:
description: Avnet, Inc.
"^awinic,.*":
description: Shanghai Awinic Technology Co., Ltd.
+ "^axelera,.*":
+ description: Axelera AI B.V.
"^axentia,.*":
description: Axentia Technologies AB
"^axiado,.*":
--
2.53.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 2/3] dt-bindings: arm: rockchip: Add Axelera Embedded 111c
2026-10-20 11:37 [PATCH v2 0/3] arm64: dts: rockchip: Add support for Axelera Embedded 111c Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 1/3] dt-bindings: vendor-prefixes: Add Axelera AI Patrick Barsanti
@ 2026-10-20 11:37 ` Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 3/3] arm64: dts: " Patrick Barsanti
2 siblings, 0 replies; 4+ messages in thread
From: Patrick Barsanti @ 2026-10-20 11:37 UTC (permalink / raw)
To: devicetree, linux-rockchip, linux-kernel, heiko, robh, krzk+dt,
conor+dt
Cc: linux-amarula, michael, dario.binacchi, Patrick Barsanti
The Axelera Embedded 111c is an SBC based on the Rockchip RK3588
SoC.
Specification:
- Rockchip RK3588
- 16GB LPDDR4
- Axelera AI Metis AIPU, 4GB/16GB LPDDR4X
- 64GB eMMC
- uSD slot
- 2x SATA ports
- 2x Gigabit LAN
- 1x M.2 E key
- 1x M.2 B key
- 1x HDMI2.0
- 1x USB-C with DP
- 4x USB3.1
Link: https://axelera.ai/axelera-products/embedded/111c
Signed-off-by: Patrick Barsanti <patrick.barsanti@amarulasolutions.com>
---
Changes in v2:
- Rename the board and its compatible following the name change from
"metis-sbc" to "embedded-111c"
- Drop Conor's Acked-by since the compatible has changed
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index a799bb843f74..1f2627c53c33 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -120,6 +120,11 @@ properties:
- asus,rk3566-tinker-board-3s
- const: rockchip,rk3566
+ - description: Axelera Embedded 111c
+ items:
+ - const: axelera,embedded-111c
+ - const: rockchip,rk3588
+
- description: Beelink A1
items:
- const: azw,beelink-a1
--
2.53.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 3/3] arm64: dts: rockchip: Add Axelera Embedded 111c
2026-10-20 11:37 [PATCH v2 0/3] arm64: dts: rockchip: Add support for Axelera Embedded 111c Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 1/3] dt-bindings: vendor-prefixes: Add Axelera AI Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 2/3] dt-bindings: arm: rockchip: Add Axelera Embedded 111c Patrick Barsanti
@ 2026-10-20 11:37 ` Patrick Barsanti
2 siblings, 0 replies; 4+ messages in thread
From: Patrick Barsanti @ 2026-10-20 11:37 UTC (permalink / raw)
To: devicetree, linux-rockchip, linux-kernel, heiko, robh, krzk+dt,
conor+dt
Cc: linux-amarula, michael, dario.binacchi, Patrick Barsanti
Add minimal device tree for the Axelera Embedded 111c
(rk3588-embedded-111c).
It offers efficient AI compute for multi-stream computer vision and
GenAI applications in a compact design. It features a quad-core
Axelera AI Metis AIPU and an RK3588 SoC processor.
This basic version of the dts supports:
- Console
- eMMC
- HDMI
- 4x USB-A
- 2x Gigabit Ethernet
- RTC
- Enumeration of on-board Axelera Metis AIPU
Link: https://axelera.ai/axelera-products/embedded/111c
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Patrick Barsanti <patrick.barsanti@amarulasolutions.com>
---
Changes in v2:
- Prepend "regulator-" to regulator nodes
- Drop non-existent "mem-supply" binding
- Drop unneeded comment from rgmii-rxid; replace it with the one from
rk3588-youyeetoo-yy3588 to stop checkpatch from complaining
- Remove phy reset from the gmac node; note that these are still not
described in the phy node because GPIO3_B7 defaults to pull-down,
which causes the rgmii_phy1 node to never come up.
Describing the reset in the parent mdio node instead does not cause
the same issue
- Use the existing hdmim1_tx0_hpd pinctrl group instead of
redefining it
- Drop "full-pwr-cycle-in-suspend" from the eMMC node
- Add "vmmc-supply" and "vqmmc-supply" to the eMMC node
- Add pinctrl for the pmic interrupt pin
- Replace the "vcc3v3_hubreset" regulator hack with two GL3523 hubs
linked with "peer-hub".
- Drop the regulators that were defined but never referenced, and their
corresponding pinctrls
- Mux PCIEX4_PERST_N as GPIO, since it is being used as reset-gpios
- Drop unused input.h include
- Drop unused rtc label
- Drop the local pciex1 pinctrl groups, as they were duplicates of the
pcie30x1m1_1_* groups in the base pinctrl for the rk3588
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3588-embedded-111c.dts | 816 ++++++++++++++++++
2 files changed, 817 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-embedded-111c.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index e7936a21c118..58daed40f86d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -191,6 +191,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-genbook.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-embedded-111c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb2-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-embedded-111c.dts b/arch/arm64/boot/dts/rockchip/rk3588-embedded-111c.dts
new file mode 100644
index 000000000000..a964b46e5c12
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-embedded-111c.dts
@@ -0,0 +1,816 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3588.dtsi"
+
+/ {
+ model = "Axelera Embedded 111c";
+ compatible = "axelera,embedded-111c", "rockchip,rk3588";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ mmc0 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ hdmi0-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi0_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ pcie20_avdd0v85: regulator-pcie20-avdd0v85 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "pcie20_avdd0v85";
+ vin-supply = <&vdda_0v85_s0>;
+ };
+
+ pcie20_avdd1v8: regulator-pcie20-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pcie20_avdd1v8";
+ vin-supply = <&vcca_1v8_s0>;
+ };
+
+ pcie30_avdd0v75: regulator-pcie30-avdd0v75 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "pcie30_avdd0v75";
+ vin-supply = <&hdmi_vdda0v85_s0>;
+ };
+
+ pcie30_avdd1v8: regulator-pcie30-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pcie30_avdd1v8";
+ vin-supply = <&vcca_1v8_s0>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc4v0_sys>;
+ };
+
+ vcc_1v8_pcie: regulator-vcc-1v8-pcie {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; /* PCIE30_PWREN_H */
+ pinctrl-0 = <&pcie30_pwren_h>;
+ pinctrl-names = "default";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_pcie";
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc_1v8_s3>;
+ };
+
+ vcc12v_dcin: regulator-vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-name = "12vsus";
+ };
+
+ vcc3v3_m2: regulator-vcc3v3-m2 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; /* PCIE_PWREN_H */
+ pinctrl-0 = <&pcie_pwren_h>;
+ pinctrl-names = "default";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "3v_m2";
+ vin-supply = <&vcc3v3_sus>;
+ };
+
+ vcc3v3_sus: regulator-vcc3v3-sus {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "3vsus";
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc4v0_sys: regulator-vcc4v0-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <4000000>;
+ regulator-max-microvolt = <4000000>;
+ regulator-name = "vcc4v0_sys";
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_host: regulator-vcc5v0-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* USB_HOST_PWREN */
+ pinctrl-0 = <&usb_host_pwren>;
+ pinctrl-names = "default";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc5v0_host";
+ vin-supply = <&vcc5v0_sus>;
+ };
+
+ vcc5v0_sus: regulator-vcc5v0-sus {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "5vsus";
+ vin-supply = <&vcc12v_dcin>;
+ };
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ /* RX delay is added by the PHY, TX delay by the GMAC */
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus
+ &gmac0_rst_n>;
+ pinctrl-names = "default";
+ tx_delay = <0x44>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ /* RX delay is added by the PHY, TX delay by the GMAC */
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus
+ &gmac1_rst_n>;
+ pinctrl-names = "default";
+ tx_delay = <0x43>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi0 {
+ pinctrl-0 = <&hdmim0_tx0_cec
+ &hdmim1_tx0_hpd
+ &hdmim0_tx0_scl
+ &hdmim0_tx0_sda>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi0_con_in>;
+ };
+};
+
+&hdmi0_sound {
+ status = "okay";
+};
+
+&hdptxphy0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0m2_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+ fcs,suspend-voltage-selector = <1>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+ fcs,suspend-voltage-selector = <1>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-0 = <&i2c1m2_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ vdd_npu_s0: vdd_npu_mem_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_npu_s0";
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc4v0_sys>;
+ fcs,suspend-voltage-selector = <1>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ rtc@68 {
+ compatible = "ti,bq32000";
+ reg = <0x68>;
+ };
+};
+
+&i2s5_8ch {
+ status = "okay";
+};
+
+&mdio0 {
+ reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; /* GMAC0_RST_N */
+ reset-delay-us = <20000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii_phy0: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&mdio1 {
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; /* GMAC1_RST_N */
+ reset-delay-us = <20000>;
+ reset-post-delay-us = <100000>;
+
+ rgmii_phy1: phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x3>;
+ };
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x4 {
+ pinctrl-0 = <&pciex4_perst_n>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; /* PCIEX4_PERST_N */
+ /*
+ * Add specific mapping required by the onboard
+ * Axelera Metis AIPU to function.
+ */
+ ranges = <0x81000000 0x0 0xf0100000 0x0 0xf0100000 0x0 0x100000
+ 0x82000000 0x0 0x40000000 0x9 0x00000000 0x0 0x20000000
+ 0xc3000000 0x0 0x60000000 0x9 0x20000000 0x0 0x20000000>;
+ /*
+ * Set to 1v8 because the electronics on the pcie3x4 slot
+ * do not receive 3v3 supply at all, but vpcie3v3-supply
+ * must be specified.
+ */
+ vpcie3v3-supply = <&vcc_1v8_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ gmac0 {
+ gmac0_rst_n: gmac0-rst-n {
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gmac1 {
+ gmac1_rst_n: gmac1-rst-n {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pci {
+ pcie_pwren_h: pcie-pwren-h {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie30_pwren_h: pcie30-pwren-h {
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pciex4_perst_n: pciex4-perst-n { /* pcie3x4 reset */
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usb_hub_rst_n: usb-hub-rst-n {
+ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8_s0>;
+ status = "okay";
+};
+
+/* eMMC */
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ status = "okay";
+};
+
+&spi2 {
+ assigned-clock-rates = <200000000>;
+ assigned-clocks = <&cru CLK_SPI2>;
+ num-cs = <1>;
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; /* PMIC_INT_L */
+ pinctrl-0 = <&pmic_pins>;
+ pinctrl-names = "default";
+ spi-max-frequency = <1000000>;
+ system-power-controller;
+ vcc1-supply = <&vcc4v0_sys>;
+ vcc2-supply = <&vcc4v0_sys>;
+ vcc3-supply = <&vcc4v0_sys>;
+ vcc4-supply = <&vcc4v0_sys>;
+ vcc5-supply = <&vcc4v0_sys>;
+ vcc6-supply = <&vcc4v0_sys>;
+ vcc7-supply = <&vcc4v0_sys>;
+ vcc8-supply = <&vcc4v0_sys>;
+ vcc9-supply = <&vcc4v0_sys>;
+ vcc10-supply = <&vcc4v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc4v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc4v0_sys>;
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_log_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_vdenc_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd_ddr_s0";
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ hdmi_vdda0v85_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "hdmi_vdda0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+&usb_host1_xhci {
+ dr_mode = "host";
+ pinctrl-0 = <&usb_hub_rst_n>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ usb20_hub1: hub@1 {
+ compatible = "usb5e3,610";
+ reg = <1>;
+ peer-hub = <&usb30_hub1>;
+ reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; /* USB_HUB_RST_N */
+ vdd-supply = <&vcc_3v3_s3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb20_hub2: hub@4 {
+ compatible = "usb5e3,610";
+ reg = <4>;
+ peer-hub = <&usb30_hub2>;
+ vdd-supply = <&vcc_3v3_s3>;
+ };
+ };
+
+ usb30_hub1: hub@2 {
+ compatible = "usb5e3,620";
+ reg = <2>;
+ peer-hub = <&usb20_hub1>;
+ vdd-supply = <&vcc_3v3_s3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb30_hub2: hub@4 {
+ compatible = "usb5e3,620";
+ reg = <4>;
+ peer-hub = <&usb20_hub2>;
+ vdd-supply = <&vcc_3v3_s3>;
+ };
+ };
+};
+
+&usbdp_phy1 {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};
--
2.53.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-10-20 11:38 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-20 11:37 [PATCH v2 0/3] arm64: dts: rockchip: Add support for Axelera Embedded 111c Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 1/3] dt-bindings: vendor-prefixes: Add Axelera AI Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 2/3] dt-bindings: arm: rockchip: Add Axelera Embedded 111c Patrick Barsanti
2026-10-20 11:37 ` [PATCH v2 3/3] arm64: dts: " Patrick Barsanti
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox