* [GIT PULL] Rockchip clock changes for 6.17 #1
@ 2025-07-18 21:08 Heiko Stuebner
2025-07-22 0:21 ` Stephen Boyd
0 siblings, 1 reply; 2+ messages in thread
From: Heiko Stuebner @ 2025-07-18 21:08 UTC (permalink / raw)
To: mturquette, Stephen Boyd; +Cc: linux-clk, linux-rockchip
Hi Mike, Stephen,
please find below a pull-request with Rockchip clock change for 6.17
Just a single new PLL rate for rk3588 this time.
Please pull.
Thanks
Heiko
The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:
Linux 6.16-rc1 (2025-06-08 13:44:43 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.17-rockchip-clk1
for you to fetch changes up to 132b62280a9dbe38c627183ae7f1611de3ee0d9a:
clk: rockchip: rk3568: Add PLL rate for 132MHz (2025-07-10 13:47:36 +0200)
----------------------------------------------------------------
Just a 132MHz PLL rate for rk3588.
----------------------------------------------------------------
Andy Yan (1):
clk: rockchip: rk3568: Add PLL rate for 132MHz
drivers/clk/rockchip/clk-rk3568.c | 1 +
1 file changed, 1 insertion(+)
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [GIT PULL] Rockchip clock changes for 6.17 #1
2025-07-18 21:08 [GIT PULL] Rockchip clock changes for 6.17 #1 Heiko Stuebner
@ 2025-07-22 0:21 ` Stephen Boyd
0 siblings, 0 replies; 2+ messages in thread
From: Stephen Boyd @ 2025-07-22 0:21 UTC (permalink / raw)
To: Heiko Stuebner, mturquette; +Cc: linux-clk, linux-rockchip
Quoting Heiko Stuebner (2025-07-18 14:08:17)
> Hi Mike, Stephen,
>
> please find below a pull-request with Rockchip clock change for 6.17
> Just a single new PLL rate for rk3588 this time.
>
>
> Please pull.
>
> Thanks
> Heiko
>
>
> The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:
>
> Linux 6.16-rc1 (2025-06-08 13:44:43 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.17-rockchip-clk1
>
> for you to fetch changes up to 132b62280a9dbe38c627183ae7f1611de3ee0d9a:
>
> clk: rockchip: rk3568: Add PLL rate for 132MHz (2025-07-10 13:47:36 +0200)
>
> ----------------------------------------------------------------
Thanks. Pulled into to clk-next
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
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