From: Shawn Lin <shawn.lin@rock-chips.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: shawn.lin@rock-chips.com, Jingoo Han <jingoohan1@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-rockchip@lists.infradead.org,
Niklas Cassel <cassel@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/2] PCI: dwc: Add LTSSM tracing support to debugfs
Date: Thu, 8 Jan 2026 12:58:28 +0800 [thread overview]
Message-ID: <70b6e8c9-8dbe-484a-b8a8-aeb7380b6ca2@rock-chips.com> (raw)
In-Reply-To: <lhshuxj4aztwbernypwgaxkdtxzonzydzipu63mspbqfygyrvy@nggpj7vwsw7n>
在 2026/01/08 星期四 12:49, Manivannan Sadhasivam 写道:
> On Thu, Jan 08, 2026 at 09:01:43AM +0800, Shawn Lin wrote:
>> 在 2026/01/07 星期三 20:41, Manivannan Sadhasivam 写道:
>>> On Tue, Jan 06, 2026 at 05:18:38PM +0800, Shawn Lin wrote:
>>>> Some platforms may provide LTSSM trace functionality, recording historical
>>>> LTSSM state transition information. This is very useful for debugging, such
>>>> as when certain devices cannot be recognized. Add an ltssm_trace operation
>>>> node in debugfs for platform which could provide these information to show
>>>> the LTSSM history.
>>>>
>>>
>>> Why don't you implement it as a tracepoint since you want to expose traces?
>>>
>>
>> I evaluated this option but didn't choose to do it just as I didn't
>> want to select CONFIG_TRACING_SUPPORT for dwc driver because of this
>> cheap function. But I'm fine to implement it as a tracepoint. Just to
>> make it clear, if a tracepoint is preferred, should I need to create a new
>> file like pcie-designware-trace?
>>
>
> I would prefer that, because that will allow us to add more tracepoints in the
> future and not muddle pcie-designware.h. General convention is to define
> trace events in a separate header.
>
I did a quick convention by adding it to the existing
include/trace/events/pci.h
The TRACE_EVENT is called pcie_ltssm_state_change, making it not just
for dwc-based but for all possible coming host drivers and the output
looks like below. Is that the way you expected?
root@debian:/#echo 1 >
/sys/kernel/debug/tracing/events/pci/pcie_ltssm_state_change/enable
root@debian:/# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 572/572 #P:8
#
# _-----=> irqs-off/BH-disabled
# / _----=> need-resched
# | / _---=> hardirq/softirq
# || / _--=> preempt-depth
# ||| / _-=> migrate-disable
# |||| / delay
# TASK-PID CPU# ||||| TIMESTAMP FUNCTION
# | | | ||||| | |
...
kworker/1:1-109 [001] ..... 4.719968: ltssm_state_change:
dev: a40000000.pcie state: 0x0d rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719969: ltssm_state_change:
dev: a40000000.pcie state: 0x0f rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719970: ltssm_state_change:
dev: a40000000.pcie state: 0x10 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719970: ltssm_state_change:
dev: a40000000.pcie state: 0x11 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719971: ltssm_state_change:
dev: a40000000.pcie state: 0x13 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719972: ltssm_state_change:
dev: a40000000.pcie state: 0x14 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719973: ltssm_state_change:
dev: a40000000.pcie state: 0x0d rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719973: ltssm_state_change:
dev: a40000000.pcie state: 0x0f rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719974: ltssm_state_change:
dev: a40000000.pcie state: 0x10 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719975: ltssm_state_change:
dev: a40000000.pcie state: 0x11 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719975: ltssm_state_change:
dev: a40000000.pcie state: 0x13 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719976: ltssm_state_change:
dev: a40000000.pcie state: 0x14 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719977: ltssm_state_change:
dev: a40000000.pcie state: 0x0d rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719977: ltssm_state_change:
dev: a40000000.pcie state: 0x0f rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719978: ltssm_state_change:
dev: a40000000.pcie state: 0x10 rate: 8.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719979: ltssm_state_change:
dev: a40000000.pcie state: 0x11 rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719980: ltssm_state_change:
dev: a40000000.pcie state: 0x13 rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719980: ltssm_state_change:
dev: a40000000.pcie state: 0x14 rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719981: ltssm_state_change:
dev: a40000000.pcie state: 0x0d rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719982: ltssm_state_change:
dev: a40000000.pcie state: 0x0f rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719982: ltssm_state_change:
dev: a40000000.pcie state: 0x10 rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719983: ltssm_state_change:
dev: a40000000.pcie state: 0x11 rate: 5.0 GT/s PCIe
kworker/1:1-109 [001] ..... 4.719984: ltssm_state_change:
dev: a40000000.pcie state: 0x13 rate: 5.0 GT/s PCIe
> - Mani
>
>>> - Mani
>>>
>>>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>>>> ---
>>>> .../controller/dwc/pcie-designware-debugfs.c | 44 +++++++++++++++++++
>>>> drivers/pci/controller/dwc/pcie-designware.h | 6 +++
>>>> 2 files changed, 50 insertions(+)
>>>>
>>>> diff --git a/drivers/pci/controller/dwc/pcie-designware-debugfs.c b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
>>>> index df98fee69892..569e8e078ef2 100644
>>>> --- a/drivers/pci/controller/dwc/pcie-designware-debugfs.c
>>>> +++ b/drivers/pci/controller/dwc/pcie-designware-debugfs.c
>>>> @@ -511,6 +511,38 @@ static int ltssm_status_open(struct inode *inode, struct file *file)
>>>> return single_open(file, ltssm_status_show, inode->i_private);
>>>> }
>>>> +static struct dw_pcie_ltssm_history *dw_pcie_ltssm_trace(struct dw_pcie *pci)
>>>> +{
>>>> + if (pci->ops && pci->ops->ltssm_trace)
>>>> + return pci->ops->ltssm_trace(pci);
>>>> +
>>>> + return NULL;
>>>> +}
>>>> +
>>>> +static int ltssm_trace_show(struct seq_file *s, void *v)
>>>> +{
>>>> + struct dw_pcie *pci = s->private;
>>>> + struct dw_pcie_ltssm_history *history;
>>>> + enum dw_pcie_ltssm val;
>>>> + u32 loop;
>>>> +
>>>> + history = dw_pcie_ltssm_trace(pci);
>>>> + if (!history)
>>>> + return 0;
>>>> +
>>>> + for (loop = 0; loop < history->count; loop++) {
>>>> + val = history->states[loop];
>>>> + seq_printf(s, "%s (0x%02x)\n", ltssm_status_string(val), val);
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static int ltssm_trace_open(struct inode *inode, struct file *file)
>>>> +{
>>>> + return single_open(file, ltssm_trace_show, inode->i_private);
>>>> +}
>>>> +
>>>> #define dwc_debugfs_create(name) \
>>>> debugfs_create_file(#name, 0644, rasdes_debug, pci, \
>>>> &dbg_ ## name ## _fops)
>>>> @@ -552,6 +584,11 @@ static const struct file_operations dwc_pcie_ltssm_status_ops = {
>>>> .read = seq_read,
>>>> };
>>>> +static const struct file_operations dwc_pcie_ltssm_trace_ops = {
>>>> + .open = ltssm_trace_open,
>>>> + .read = seq_read,
>>>> +};
>>>> +
>>>> static void dwc_pcie_rasdes_debugfs_deinit(struct dw_pcie *pci)
>>>> {
>>>> struct dwc_pcie_rasdes_info *rinfo = pci->debugfs->rasdes_info;
>>>> @@ -644,6 +681,12 @@ static void dwc_pcie_ltssm_debugfs_init(struct dw_pcie *pci, struct dentry *dir)
>>>> &dwc_pcie_ltssm_status_ops);
>>>> }
>>>> +static void dwc_pcie_ltssm_trace_debugfs_init(struct dw_pcie *pci, struct dentry *dir)
>>>> +{
>>>> + debugfs_create_file("ltssm_trace", 0444, dir, pci,
>>>> + &dwc_pcie_ltssm_trace_ops);
>>>> +}
>>>> +
>>>> static int dw_pcie_ptm_check_capability(void *drvdata)
>>>> {
>>>> struct dw_pcie *pci = drvdata;
>>>> @@ -922,6 +965,7 @@ void dwc_pcie_debugfs_init(struct dw_pcie *pci, enum dw_pcie_device_mode mode)
>>>> err);
>>>> dwc_pcie_ltssm_debugfs_init(pci, dir);
>>>> + dwc_pcie_ltssm_trace_debugfs_init(pci, dir);
>>>> pci->mode = mode;
>>>> pci->ptm_debugfs = pcie_ptm_create_debugfs(pci->dev, pci,
>>>> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
>>>> index 5cd27f5739f1..0df18995b7fe 100644
>>>> --- a/drivers/pci/controller/dwc/pcie-designware.h
>>>> +++ b/drivers/pci/controller/dwc/pcie-designware.h
>>>> @@ -395,6 +395,11 @@ enum dw_pcie_ltssm {
>>>> DW_PCIE_LTSSM_UNKNOWN = 0xFFFFFFFF,
>>>> };
>>>> +struct dw_pcie_ltssm_history {
>>>> + enum dw_pcie_ltssm *states;
>>>> + u32 count;
>>>> +};
>>>> +
>>>> struct dw_pcie_ob_atu_cfg {
>>>> int index;
>>>> int type;
>>>> @@ -499,6 +504,7 @@ struct dw_pcie_ops {
>>>> size_t size, u32 val);
>>>> bool (*link_up)(struct dw_pcie *pcie);
>>>> enum dw_pcie_ltssm (*get_ltssm)(struct dw_pcie *pcie);
>>>> + struct dw_pcie_ltssm_history * (*ltssm_trace)(struct dw_pcie *pcie);
>>>> int (*start_link)(struct dw_pcie *pcie);
>>>> void (*stop_link)(struct dw_pcie *pcie);
>>>> int (*assert_perst)(struct dw_pcie *pcie, bool assert);
>>>> --
>>>> 2.43.0
>>>>
>>>>
>>>
>>
>>
>
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next prev parent reply other threads:[~2026-01-08 4:58 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-06 9:18 [PATCH 1/2] PCI: dwc: Add LTSSM tracing support to debugfs Shawn Lin
2026-01-06 9:18 ` [PATCH 2/2] PCI: dw-rockchip: Add .ltssm_trace() support Shawn Lin
2026-01-07 9:12 ` [PATCH 1/2] PCI: dwc: Add LTSSM tracing support to debugfs Krishna Chaitanya Chundru
2026-01-07 9:41 ` Shawn Lin
2026-01-07 10:09 ` Krishna Chaitanya Chundru
2026-01-07 12:40 ` Manivannan Sadhasivam
2026-01-07 12:41 ` Manivannan Sadhasivam
2026-01-08 1:01 ` Shawn Lin
2026-01-08 4:49 ` Manivannan Sadhasivam
2026-01-08 4:58 ` Shawn Lin [this message]
2026-01-08 17:05 ` Manivannan Sadhasivam
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