From: Thomas Gleixner <tglx@kernel.org>
To: Manivannan Sadhasivam <mani@kernel.org>,
Shawn Lin <shawn.lin@rock-chips.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH] PCI: dw-rockchip: Enable INTx affinity support
Date: Sun, 18 Oct 2026 22:04:24 +0200 [thread overview]
Message-ID: <87y0bubws7.ffs@fw13> (raw)
In-Reply-To: <atRLsp1qUA_sGS-0@debian>
On Sun, Oct 18 2026 at 10:05, Manivannan Sadhasivam wrote:
> On Tue, Sep 29, 2026 at 02:54:58PM +0800, Shawn Lin wrote:
>> Leverage the interrupt redirection infrastructure to enable CPU
>> affinity support for the legacy INTx interrupts. The INTx virqs are
>> demultiplexed by the chained handler of the "legacy" interrupt, whose
>> affinity cannot be changed, so affinity control for the INTx virqs is
>> achieved by redirecting the handler to run in IRQ work context on the
>> target CPU.
>>
>> Mask the INTx source in .irq_pre_redirect() before the handler is
>> redirected: the legacy interrupt is level triggered, so an unmasked
>> line would keep re-firing the chained interrupt until the redirected
>> handler runs.
>>
>> Same approach as the DesignWare core, commit eaf290c404f7c39f2 ("PCI:
>> dwc: Enable MSI affinity support").
>>
>> Test was done on RK3588 EVB1 board with an NVMe with pci=nomsi
>> parameter. The /proc/interrupts columns are trimmed for brevity.
>>
>> # cat /proc/interrupts | grep INTx
>> 51: 137 0 0 0 0 0 0 0 INTx 0 Edge PCIe PME, nvme0q0, nvme0q1
>> # echo 10 > /proc/irq/51/smp_affinity
>> # dd if=/dev/nvme0n1p1 of=/dev/null bs=1M count=200
>> 200+0 records in
>> 200+0 records out
>> 209715200 bytes (210 MB, 200 MiB) copied, 0.182021 s, 1.2 GB/s
>> # cat /proc/interrupts | grep INTx
>> 51: 137 0 0 0 946 0 0 0 INTx 0 Edge PCIe PME, nvme0q0, nvme0q1
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> I'd like to get an Ack from Thomas for this patch since I'm not an irqchip
> expert to decipher whether this patch is valid or not.
I'm happy to look at it, but I can't be bothered to fish it out from a
mail archive. Can you please bounce me the original submission?
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next prev parent reply other threads:[~2026-10-18 20:04 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 6:54 [PATCH] PCI: dw-rockchip: Enable INTx affinity support Shawn Lin
2026-10-18 4:35 ` Manivannan Sadhasivam
2026-10-18 20:04 ` Thomas Gleixner [this message]
2026-10-19 0:25 ` Shawn Lin
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