* [PATCH v3 0/7] media: rkvdec: Add HEVC backend
@ 2025-09-05 16:19 Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 1/7] " Jonas Karlman
` (9 more replies)
0 siblings, 10 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
This series add a HEVC backend to the Rockchip Video Decoder driver.
With the dependent H.264 High 10 and 4:2:2 profile support series
finally merged there is finally time to send a v2 with minor changes and
a suggested code style fix of this series. v1 of this series has been
fully functional up until recent unstaging of the rkvdec driver.
A version of this HEVC backend has been in use by the LibreELEC distro
for the past 5+ years [1]. It was initially created based on a copy of
the H264 backend, unstable HEVC uAPI controls and a cabac table + scaling
matrix functions shamelessly copied 1:1 from the Rockchip mpp library.
It has since then been extended to use the stable HEVC uAPI controls and
improved opon e.g. to include support for rk3288 and fix decoding issues
by Alex Bee and Nicolas Dufresne.
The version submitted in this series is based on the code currently used
by the LibreELEC distro, excluding hard/soft reset, and with cabac table
and scaling matrix functions picked from Sebastian Fricke prior series
to add a HEVC backend [2].
Big thanks to Alex Bee, Nicolas Dufresne and Sebastian Fricke for making
this series possible!
Patch 1 add the new HEVC backend.
Patch 2-3 add variants support to the driver.
Patch 4 add support for a rk3288 variant.
Patch 5 add a rk3328 variant to work around hw quirks.
Patch 6-7 add device tree node for rk3288.
This was tested on a ROCK Pi 4 (RK3399) and Rock64 (RK3328):
v4l2-compliance 1.30.1, 64 bits, 64-bit time_t
...
Total for rkvdec device /dev/video1: 49, Succeeded: 49, Failed: 0, Warnings: 0
Running test suite JCT-VC-HEVC_V1 with decoder FFmpeg-H.265-v4l2request
...
Ran 137/147 tests successfully
Running test suite JCT-VC-MV-HEVC with decoder FFmpeg-H.265-v4l2request
...
Ran 9/9 tests successfully
And on a TinkerBoard (RK3288):
v4l2-compliance 1.30.1, 32 bits, 32-bit time_t
...
Total for rkvdec device /dev/video3: 49, Succeeded: 49, Failed: 0, Warnings: 0
Running test suite JCT-VC-HEVC_V1 with decoder FFmpeg-H.265-v4l2request
...
Ran 137/147 tests successfully
Running test suite JCT-VC-MV-HEVC with decoder FFmpeg-H.265-v4l2request
...
Ran 9/9 tests successfully
The WPP_x_ericsson tests from test suite JCT-VC-HEVC_V1 has been showing
a mix of both Success and/or Fail result for FFmpeg-H.265-v4l2request.
Full summary of fluster run can be found at [3].
Please note that there is a known issue with concurrent decoding,
decoding errors in one decode session may affect a separate session.
The only known mitigation to this is to pause decoding for some time
and/or do a full HW reset, something to handle in future series.
Changes in v3:
- Change to use file_to_rkvdec_ctx()
- Rename assemble_hw_rps to assemble_sw_rps
- Use a reference to rkvdec_variant instead of copying capabilities and
quirks to rkvdec_dev
- Add num_regs field to rkvdec_variant, currently not used for anything
- Add and use rkvdec_quirks_disable_qos() helper to apply qos quirk
- Collect t-b and r-b tags
Link to v2: https://lore.kernel.org/linux-media/20250810212454.3237486-1-jonas@kwiboo.se
Changes in v2:
- Rabase after h264 high10/422 merge and unstaging of rkvdec driver
- Use new_value in transpose_and_flatten_matrices()
- Add NULL check for ctrl->new_elems in rkvdec_hevc_run_preamble()
- Set RKVDEC_WR_DDR_ALIGN_EN for RK3328
- Adjust code style in rkvdec_enum_coded_fmt_desc()
- Collect a-b tag
- Drop merged vdec node reg size patches
Link to v1: https://lore.kernel.org/linux-media/20231105233630.3927502-1-jonas@kwiboo.se
[1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/projects/Rockchip/patches/linux/default/linux-2000-v4l2-wip-rkvdec-hevc.patch
[2] https://lore.kernel.org/linux-media/20230101-patch-series-v2-6-2-rc1-v2-0-fa1897efac14@collabora.com/
[3] https://gist.github.com/Kwiboo/0ea22df1c9c3f3a48479d3f7ec28169d
Alex Bee (4):
media: rkvdec: Add variants support
media: rkvdec: Add RK3288 variant
media: rkvdec: Disable QoS for HEVC and VP9 on RK3328
ARM: dts: rockchip: Add vdec node for RK3288
Jonas Karlman (3):
media: rkvdec: Add HEVC backend
media: rkvdec: Implement capability filtering
media: dt-bindings: rockchip,vdec: Add RK3288 compatible
.../bindings/media/rockchip,vdec.yaml | 1 +
arch/arm/boot/dts/rockchip/rk3288.dtsi | 17 +-
.../media/platform/rockchip/rkvdec/Makefile | 2 +-
.../rockchip/rkvdec/rkvdec-hevc-data.c | 1848 +++++++++++++++++
.../platform/rockchip/rkvdec/rkvdec-hevc.c | 820 ++++++++
.../platform/rockchip/rkvdec/rkvdec-regs.h | 4 +
.../platform/rockchip/rkvdec/rkvdec-vp9.c | 4 +
.../media/platform/rockchip/rkvdec/rkvdec.c | 198 +-
.../media/platform/rockchip/rkvdec/rkvdec.h | 17 +
9 files changed, 2890 insertions(+), 21 deletions(-)
create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c
create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
--
2.51.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 1/7] media: rkvdec: Add HEVC backend
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 2/7] media: rkvdec: Add variants support Jonas Karlman
` (8 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman,
Sebastian Fricke
The Rockchip VDEC supports the HEVC codec with the Main and Main10
Profile up to Level 5.1 High tier: 4096x2304@60 fps.
Add the backend for HEVC format to the decoder.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Rename assemble_hw_rps to assemble_sw_rps
- Collect t-b and r-b tags
Changes in v2:
- Use new_value in transpose_and_flatten_matrices()
- Add NULL check for ctrl->new_elems in rkvdec_hevc_run_preamble()
- Set RKVDEC_WR_DDR_ALIGN_EN for RK3328
---
.../media/platform/rockchip/rkvdec/Makefile | 2 +-
.../rockchip/rkvdec/rkvdec-hevc-data.c | 1848 +++++++++++++++++
.../platform/rockchip/rkvdec/rkvdec-hevc.c | 817 ++++++++
.../platform/rockchip/rkvdec/rkvdec-regs.h | 2 +
.../media/platform/rockchip/rkvdec/rkvdec.c | 76 +
.../media/platform/rockchip/rkvdec/rkvdec.h | 1 +
6 files changed, 2745 insertions(+), 1 deletion(-)
create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c
create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
diff --git a/drivers/media/platform/rockchip/rkvdec/Makefile b/drivers/media/platform/rockchip/rkvdec/Makefile
index cb86b429cfaa..a77122641d14 100644
--- a/drivers/media/platform/rockchip/rkvdec/Makefile
+++ b/drivers/media/platform/rockchip/rkvdec/Makefile
@@ -1,3 +1,3 @@
obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o
-rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o
+rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-hevc.o rkvdec-vp9.o
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c
new file mode 100644
index 000000000000..eac4ea604949
--- /dev/null
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c
@@ -0,0 +1,1848 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip Video Decoder driver
+ *
+ * Copyright (C) 2023 Collabora, Ltd.
+ * Sebastian Fricke <sebastian.fricke@collabora.com>
+ */
+
+#include <linux/types.h>
+
+#define RKV_CABAC_TABLE_SIZE 27456
+
+/*
+ * This file is #include from rkvdec-hevc.c and not compiled.
+ */
+static const u8 rkvdec_hevc_cabac_table[RKV_CABAC_TABLE_SIZE] = {
+ 0x07, 0x0f, 0x48, 0x58, 0x58, 0x40, 0x40, 0x40, 0x40, 0x40, 0x0f, 0x40, 0x40, 0x40, 0x0f,
+ 0x68, 0x48, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x07, 0x40,
+ 0x40, 0x68, 0x58, 0x60, 0x40, 0x1f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x48, 0x48, 0x60,
+ 0x60, 0x50, 0x58, 0x50, 0x07, 0x58, 0x68, 0x50, 0x58, 0x68, 0x68, 0x68, 0x68, 0x68, 0x50,
+ 0x48, 0x68, 0x60, 0x60, 0x50, 0x58, 0x50, 0x07, 0x58, 0x68, 0x50, 0x58, 0x68, 0x68, 0x68,
+ 0x68, 0x68, 0x50, 0x48, 0x68, 0x48, 0x48, 0x1f, 0x58, 0x68, 0x68, 0x58, 0x60, 0x60, 0x60,
+ 0x50, 0x50, 0x50, 0x48, 0x58, 0x58, 0x37, 0x07, 0x58, 0x48, 0x58, 0x58, 0x37, 0x07, 0x58,
+ 0x48, 0x58, 0x58, 0x37, 0x07, 0x58, 0x50, 0x48, 0x1f, 0x1f, 0x0f, 0x0f, 0x0f, 0x0f, 0x07,
+ 0x0f, 0x48, 0x68, 0x0f, 0x48, 0x68, 0x40, 0x40, 0x50, 0x50, 0x07, 0x40, 0x50, 0x0f, 0x40,
+ 0x48, 0x07, 0x40, 0x27, 0x50, 0x48, 0x48, 0x40, 0x0f, 0x50, 0x37, 0x1f, 0x1f, 0x50, 0x37,
+ 0x40, 0x27, 0x40, 0x07, 0x0f, 0x17, 0x0f, 0x0f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0f, 0x47, 0x57,
+ 0x58, 0x40, 0x40, 0x40, 0x40, 0x40, 0x0f, 0x40, 0x40, 0x40, 0x0f, 0x66, 0x47, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x07, 0x00, 0x00, 0x67, 0x57, 0x5e,
+ 0x00, 0x1f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x47, 0x47, 0x5f, 0x5f, 0x4f, 0x57, 0x4f,
+ 0x07, 0x57, 0x67, 0x4f, 0x57, 0x67, 0x67, 0x67, 0x67, 0x66, 0x4f, 0x47, 0x66, 0x5f, 0x5f,
+ 0x4f, 0x57, 0x4f, 0x07, 0x57, 0x67, 0x4f, 0x57, 0x67, 0x67, 0x67, 0x67, 0x66, 0x4f, 0x47,
+ 0x66, 0x46, 0x48, 0x20, 0x57, 0x67, 0x67, 0x57, 0x5f, 0x5f, 0x5e, 0x4f, 0x4f, 0x4f, 0x47,
+ 0x57, 0x57, 0x37, 0x07, 0x57, 0x47, 0x57, 0x57, 0x37, 0x07, 0x57, 0x47, 0x57, 0x57, 0x37,
+ 0x07, 0x57, 0x4f, 0x47, 0x1f, 0x1f, 0x0f, 0x10, 0x0f, 0x10, 0x07, 0x10, 0x47, 0x67, 0x10,
+ 0x47, 0x67, 0x40, 0x40, 0x4f, 0x4e, 0x08, 0x00, 0x4f, 0x0f, 0x00, 0x47, 0x07, 0x01, 0x27,
+ 0x4e, 0x47, 0x47, 0x00, 0x0f, 0x4f, 0x37, 0x1f, 0x1f, 0x4f, 0x36, 0x00, 0x27, 0x00, 0x07,
+ 0x10, 0x17, 0x0f, 0x0f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0e, 0x47, 0x57, 0x58, 0x40, 0x40, 0x40,
+ 0x40, 0x40, 0x0e, 0x40, 0x40, 0x40, 0x0e, 0x64, 0x47, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x07, 0x00, 0x00, 0x66, 0x57, 0x5d, 0x00, 0x1e, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x47, 0x47, 0x5e, 0x5e, 0x4e, 0x56, 0x4f, 0x07, 0x56, 0x66, 0x4f,
+ 0x56, 0x66, 0x67, 0x66, 0x66, 0x64, 0x4e, 0x46, 0x64, 0x5e, 0x5e, 0x4e, 0x56, 0x4f, 0x07,
+ 0x56, 0x66, 0x4f, 0x56, 0x66, 0x67, 0x66, 0x66, 0x64, 0x4e, 0x46, 0x64, 0x45, 0x48, 0x20,
+ 0x57, 0x66, 0x66, 0x56, 0x5e, 0x5e, 0x5d, 0x4e, 0x4e, 0x4e, 0x46, 0x56, 0x57, 0x36, 0x07,
+ 0x56, 0x46, 0x56, 0x57, 0x36, 0x07, 0x56, 0x46, 0x56, 0x57, 0x36, 0x07, 0x56, 0x4f, 0x47,
+ 0x1e, 0x1e, 0x0f, 0x10, 0x0f, 0x10, 0x07, 0x10, 0x47, 0x66, 0x10, 0x47, 0x66, 0x40, 0x40,
+ 0x4f, 0x4d, 0x08, 0x00, 0x4f, 0x0f, 0x00, 0x47, 0x07, 0x03, 0x27, 0x4d, 0x47, 0x46, 0x01,
+ 0x0f, 0x4f, 0x36, 0x1f, 0x1e, 0x4f, 0x34, 0x01, 0x26, 0x00, 0x07, 0x10, 0x17, 0x0f, 0x0f,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x07, 0x0d, 0x47, 0x57, 0x58, 0x40, 0x40, 0x40, 0x40, 0x40, 0x0e, 0x40,
+ 0x40, 0x40, 0x0e, 0x62, 0x47, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x07, 0x00, 0x00, 0x65, 0x57, 0x5c, 0x00, 0x1e, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x47, 0x47, 0x5d, 0x5d, 0x4e, 0x56, 0x4f, 0x07, 0x56, 0x66, 0x4f, 0x55, 0x65, 0x67, 0x66,
+ 0x65, 0x63, 0x4d, 0x46, 0x62, 0x5d, 0x5d, 0x4e, 0x56, 0x4f, 0x07, 0x56, 0x66, 0x4f, 0x55,
+ 0x65, 0x67, 0x66, 0x65, 0x63, 0x4d, 0x46, 0x62, 0x44, 0x48, 0x20, 0x57, 0x65, 0x65, 0x56,
+ 0x5d, 0x5d, 0x5c, 0x4e, 0x4d, 0x4e, 0x45, 0x56, 0x57, 0x36, 0x07, 0x56, 0x45, 0x56, 0x57,
+ 0x36, 0x07, 0x56, 0x45, 0x56, 0x57, 0x36, 0x07, 0x56, 0x4f, 0x47, 0x1e, 0x1e, 0x0f, 0x10,
+ 0x0f, 0x10, 0x07, 0x10, 0x47, 0x65, 0x10, 0x47, 0x65, 0x40, 0x40, 0x4f, 0x4c, 0x08, 0x00,
+ 0x4f, 0x0f, 0x00, 0x47, 0x07, 0x04, 0x27, 0x4c, 0x47, 0x45, 0x01, 0x0f, 0x4f, 0x36, 0x1f,
+ 0x1e, 0x4f, 0x33, 0x01, 0x25, 0x00, 0x07, 0x10, 0x17, 0x0f, 0x0f, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
+ 0x0c, 0x46, 0x56, 0x58, 0x40, 0x40, 0x40, 0x40, 0x40, 0x0d, 0x40, 0x40, 0x40, 0x0d, 0x60,
+ 0x46, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x07, 0x01, 0x01,
+ 0x64, 0x56, 0x5b, 0x01, 0x1d, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x46, 0x46, 0x5c, 0x5c,
+ 0x4d, 0x55, 0x4e, 0x07, 0x55, 0x65, 0x4e, 0x54, 0x64, 0x66, 0x65, 0x64, 0x61, 0x4c, 0x45,
+ 0x60, 0x5c, 0x5c, 0x4d, 0x55, 0x4e, 0x07, 0x55, 0x65, 0x4e, 0x54, 0x64, 0x66, 0x65, 0x64,
+ 0x61, 0x4c, 0x45, 0x60, 0x43, 0x49, 0x21, 0x56, 0x64, 0x64, 0x55, 0x5c, 0x5c, 0x5b, 0x4d,
+ 0x4c, 0x4d, 0x44, 0x55, 0x56, 0x35, 0x07, 0x55, 0x44, 0x55, 0x56, 0x35, 0x07, 0x55, 0x44,
+ 0x55, 0x56, 0x35, 0x07, 0x55, 0x4e, 0x46, 0x1d, 0x1d, 0x0f, 0x11, 0x0f, 0x11, 0x07, 0x11,
+ 0x46, 0x64, 0x11, 0x46, 0x64, 0x40, 0x40, 0x4e, 0x4b, 0x09, 0x01, 0x4e, 0x0f, 0x01, 0x46,
+ 0x07, 0x06, 0x27, 0x4b, 0x46, 0x44, 0x02, 0x0f, 0x4e, 0x35, 0x1e, 0x1d, 0x4e, 0x31, 0x02,
+ 0x24, 0x01, 0x07, 0x11, 0x16, 0x0f, 0x0f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0b, 0x46, 0x56, 0x58,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x0c, 0x40, 0x40, 0x40, 0x0c, 0x5e, 0x46, 0x40, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x07, 0x01, 0x01, 0x63, 0x56, 0x59, 0x01,
+ 0x1c, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x46, 0x46, 0x5b, 0x5b, 0x4c, 0x54, 0x4e, 0x07,
+ 0x54, 0x64, 0x4e, 0x53, 0x63, 0x66, 0x64, 0x63, 0x60, 0x4b, 0x44, 0x5e, 0x5b, 0x5b, 0x4c,
+ 0x54, 0x4e, 0x07, 0x54, 0x64, 0x4e, 0x53, 0x63, 0x66, 0x64, 0x63, 0x60, 0x4b, 0x44, 0x5e,
+ 0x41, 0x49, 0x21, 0x56, 0x63, 0x63, 0x54, 0x5b, 0x5b, 0x59, 0x4c, 0x4b, 0x4c, 0x43, 0x54,
+ 0x56, 0x34, 0x07, 0x54, 0x43, 0x54, 0x56, 0x34, 0x07, 0x54, 0x43, 0x54, 0x56, 0x34, 0x07,
+ 0x54, 0x4e, 0x46, 0x1c, 0x1c, 0x0f, 0x11, 0x0f, 0x11, 0x07, 0x11, 0x46, 0x63, 0x11, 0x46,
+ 0x63, 0x40, 0x40, 0x4e, 0x49, 0x09, 0x01, 0x4e, 0x0f, 0x01, 0x46, 0x07, 0x07, 0x27, 0x49,
+ 0x46, 0x43, 0x03, 0x0f, 0x4e, 0x34, 0x1e, 0x1c, 0x4e, 0x30, 0x03, 0x23, 0x01, 0x07, 0x11,
+ 0x16, 0x0f, 0x0f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0a, 0x46, 0x56, 0x58, 0x40, 0x40, 0x40, 0x40,
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+ 0x14, 0x2e, 0x0c, 0x11, 0x44, 0x41, 0x1e, 0x07, 0x40, 0x11, 0x44, 0x41, 0x1e, 0x07, 0x40,
+ 0x11, 0x44, 0x41, 0x1e, 0x07, 0x40, 0x4e, 0x07, 0x0e, 0x0e, 0x1c, 0x24, 0x1c, 0x24, 0x09,
+ 0x17, 0x44, 0x41, 0x17, 0x44, 0x41, 0x40, 0x40, 0x40, 0x04, 0x09, 0x09, 0x40, 0x0f, 0x09,
+ 0x03, 0x03, 0x2e, 0x27, 0x1e, 0x07, 0x24, 0x1e, 0x1c, 0x46, 0x16, 0x11, 0x09, 0x40, 0x0f,
+ 0x09, 0x03, 0x23, 0x09, 0x31, 0x23, 0x23, 0x09, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x3e, 0x24, 0x06,
+ 0x42, 0x40, 0x44, 0x55, 0x64, 0x2e, 0x40, 0x06, 0x40, 0x40, 0x45, 0x0f, 0x06, 0x21, 0x40,
+ 0x16, 0x12, 0x21, 0x30, 0x3e, 0x3e, 0x07, 0x07, 0x01, 0x06, 0x09, 0x1d, 0x07, 0x04, 0x27,
+ 0x2a, 0x09, 0x40, 0x46, 0x4c, 0x40, 0x40, 0x40, 0x06, 0x06, 0x05, 0x0c, 0x0d, 0x0c, 0x12,
+ 0x1a, 0x05, 0x04, 0x04, 0x21, 0x05, 0x42, 0x04, 0x04, 0x21, 0x1c, 0x15, 0x22, 0x05, 0x0c,
+ 0x0d, 0x0c, 0x12, 0x1a, 0x05, 0x04, 0x04, 0x21, 0x05, 0x42, 0x04, 0x04, 0x21, 0x1c, 0x15,
+ 0x22, 0x25, 0x41, 0x3e, 0x40, 0x4e, 0x40, 0x06, 0x07, 0x06, 0x15, 0x15, 0x30, 0x0d, 0x11,
+ 0x45, 0x41, 0x1e, 0x07, 0x40, 0x11, 0x45, 0x41, 0x1e, 0x07, 0x40, 0x11, 0x45, 0x41, 0x1e,
+ 0x07, 0x40, 0x4e, 0x07, 0x0e, 0x0e, 0x1d, 0x25, 0x1d, 0x25, 0x09, 0x17, 0x45, 0x41, 0x17,
+ 0x45, 0x41, 0x40, 0x40, 0x40, 0x03, 0x09, 0x09, 0x40, 0x0f, 0x09, 0x02, 0x02, 0x2e, 0x27,
+ 0x1e, 0x07, 0x25, 0x1e, 0x1d, 0x46, 0x15, 0x11, 0x09, 0x40, 0x0f, 0x09, 0x02, 0x24, 0x09,
+ 0x32, 0x24, 0x24, 0x09, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x3e, 0x24, 0x06, 0x42, 0x40, 0x45, 0x56,
+ 0x65, 0x2e, 0x40, 0x06, 0x40, 0x40, 0x46, 0x0f, 0x06, 0x22, 0x40, 0x16, 0x13, 0x22, 0x31,
+ 0x3e, 0x3e, 0x07, 0x07, 0x00, 0x04, 0x08, 0x1d, 0x07, 0x04, 0x27, 0x2b, 0x08, 0x40, 0x47,
+ 0x4d, 0x40, 0x40, 0x40, 0x06, 0x06, 0x05, 0x0c, 0x0d, 0x0c, 0x13, 0x1b, 0x05, 0x04, 0x04,
+ 0x22, 0x05, 0x42, 0x04, 0x04, 0x22, 0x1c, 0x15, 0x23, 0x05, 0x0c, 0x0d, 0x0c, 0x13, 0x1b,
+ 0x05, 0x04, 0x04, 0x22, 0x05, 0x42, 0x04, 0x04, 0x22, 0x1c, 0x15, 0x23, 0x25, 0x41, 0x3e,
+ 0x40, 0x4f, 0x40, 0x06, 0x07, 0x06, 0x15, 0x15, 0x31, 0x0d, 0x10, 0x46, 0x41, 0x1e, 0x07,
+ 0x40, 0x10, 0x46, 0x41, 0x1e, 0x07, 0x40, 0x10, 0x46, 0x41, 0x1e, 0x07, 0x40, 0x4f, 0x07,
+ 0x0e, 0x0e, 0x1d, 0x25, 0x1d, 0x25, 0x08, 0x17, 0x46, 0x41, 0x17, 0x46, 0x41, 0x40, 0x40,
+ 0x40, 0x02, 0x08, 0x08, 0x40, 0x0f, 0x08, 0x01, 0x01, 0x2e, 0x27, 0x1e, 0x07, 0x25, 0x1e,
+ 0x1d, 0x47, 0x13, 0x10, 0x08, 0x40, 0x0f, 0x08, 0x01, 0x24, 0x08, 0x33, 0x24, 0x24, 0x08,
+ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x07, 0x3e, 0x25, 0x07, 0x41, 0x40, 0x45, 0x56, 0x65, 0x2f, 0x40, 0x07,
+ 0x40, 0x40, 0x46, 0x0f, 0x07, 0x24, 0x40, 0x17, 0x15, 0x24, 0x33, 0x3e, 0x3e, 0x07, 0x07,
+ 0x00, 0x03, 0x08, 0x1e, 0x07, 0x05, 0x27, 0x2d, 0x08, 0x40, 0x47, 0x4d, 0x40, 0x40, 0x40,
+ 0x07, 0x07, 0x06, 0x0d, 0x0e, 0x0d, 0x15, 0x1d, 0x06, 0x05, 0x05, 0x24, 0x06, 0x41, 0x05,
+ 0x05, 0x24, 0x1d, 0x16, 0x25, 0x06, 0x0d, 0x0e, 0x0d, 0x15, 0x1d, 0x06, 0x05, 0x05, 0x24,
+ 0x06, 0x41, 0x05, 0x05, 0x24, 0x1d, 0x16, 0x25, 0x26, 0x40, 0x3e, 0x40, 0x4f, 0x40, 0x07,
+ 0x07, 0x07, 0x16, 0x16, 0x33, 0x0e, 0x10, 0x46, 0x40, 0x1f, 0x07, 0x40, 0x10, 0x46, 0x40,
+ 0x1f, 0x07, 0x40, 0x10, 0x46, 0x40, 0x1f, 0x07, 0x40, 0x4f, 0x07, 0x0f, 0x0f, 0x1e, 0x26,
+ 0x1e, 0x26, 0x08, 0x17, 0x46, 0x40, 0x17, 0x46, 0x40, 0x40, 0x40, 0x40, 0x02, 0x08, 0x08,
+ 0x40, 0x0f, 0x08, 0x01, 0x01, 0x2f, 0x27, 0x1f, 0x07, 0x26, 0x1f, 0x1e, 0x47, 0x12, 0x10,
+ 0x08, 0x40, 0x0f, 0x08, 0x01, 0x25, 0x08, 0x35, 0x25, 0x25, 0x08, 0x40, 0x40, 0x40, 0x40,
+ 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
+ 0x3e, 0x26, 0x07, 0x40, 0x40, 0x46, 0x57, 0x66, 0x2f, 0x40, 0x07, 0x40, 0x40, 0x47, 0x0f,
+ 0x07, 0x26, 0x40, 0x17, 0x16, 0x26, 0x35, 0x3e, 0x3e, 0x07, 0x07, 0x00, 0x01, 0x08, 0x1f,
+ 0x07, 0x06, 0x27, 0x2e, 0x08, 0x40, 0x47, 0x4e, 0x40, 0x40, 0x40, 0x07, 0x07, 0x07, 0x0e,
+ 0x0f, 0x0e, 0x16, 0x1e, 0x07, 0x06, 0x06, 0x26, 0x07, 0x40, 0x06, 0x06, 0x26, 0x1e, 0x17,
+ 0x26, 0x07, 0x0e, 0x0f, 0x0e, 0x16, 0x1e, 0x07, 0x06, 0x06, 0x26, 0x07, 0x40, 0x06, 0x06,
+ 0x26, 0x1e, 0x17, 0x26, 0x27, 0x40, 0x3e, 0x40, 0x4f, 0x40, 0x07, 0x07, 0x07, 0x17, 0x17,
+ 0x35, 0x0f, 0x10, 0x47, 0x40, 0x1f, 0x07, 0x40, 0x10, 0x47, 0x40, 0x1f, 0x07, 0x40, 0x10,
+ 0x47, 0x40, 0x1f, 0x07, 0x40, 0x4f, 0x07, 0x0f, 0x0f, 0x1f, 0x27, 0x1f, 0x27, 0x08, 0x17,
+ 0x47, 0x40, 0x17, 0x47, 0x40, 0x40, 0x40, 0x40, 0x01, 0x08, 0x08, 0x40, 0x0f, 0x08, 0x00,
+ 0x00, 0x2f, 0x27, 0x1f, 0x07, 0x27, 0x1f, 0x1f, 0x47, 0x11, 0x10, 0x08, 0x40, 0x0f, 0x08,
+ 0x00, 0x26, 0x08, 0x36, 0x26, 0x26, 0x08, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x3e, 0x27, 0x07, 0x40,
+ 0x40, 0x47, 0x57, 0x67, 0x2f, 0x40, 0x07, 0x40, 0x40, 0x47, 0x0f, 0x07, 0x27, 0x40, 0x17,
+ 0x17, 0x27, 0x37, 0x3e, 0x3e, 0x07, 0x07, 0x00, 0x00, 0x08, 0x1f, 0x07, 0x07, 0x27, 0x2f,
+ 0x08, 0x40, 0x47, 0x4f, 0x40, 0x40, 0x40, 0x07, 0x07, 0x07, 0x0f, 0x0f, 0x0f, 0x17, 0x1f,
+ 0x07, 0x07, 0x07, 0x27, 0x07, 0x40, 0x07, 0x07, 0x27, 0x1f, 0x17, 0x27, 0x07, 0x0f, 0x0f,
+ 0x0f, 0x17, 0x1f, 0x07, 0x07, 0x07, 0x27, 0x07, 0x40, 0x07, 0x07, 0x27, 0x1f, 0x17, 0x27,
+ 0x27, 0x40, 0x3e, 0x40, 0x4f, 0x40, 0x07, 0x07, 0x07, 0x17, 0x17, 0x37, 0x0f, 0x10, 0x47,
+ 0x40, 0x1f, 0x07, 0x40, 0x10, 0x47, 0x40, 0x1f, 0x07, 0x40, 0x10, 0x47, 0x40, 0x1f, 0x07,
+ 0x40, 0x4f, 0x07, 0x0f, 0x0f, 0x1f, 0x27, 0x1f, 0x27, 0x08, 0x17, 0x47, 0x40, 0x17, 0x47,
+ 0x40, 0x40, 0x40, 0x40, 0x00, 0x08, 0x08, 0x40, 0x0f, 0x08, 0x00, 0x00, 0x2f, 0x27, 0x1f,
+ 0x07, 0x27, 0x1f, 0x1f, 0x47, 0x10, 0x10, 0x08, 0x40, 0x0f, 0x08, 0x00, 0x27, 0x08, 0x37,
+ 0x27, 0x27, 0x08, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
new file mode 100644
index 000000000000..9b5cf70188db
--- /dev/null
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
@@ -0,0 +1,817 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip Video Decoder HEVC backend
+ *
+ * Copyright (C) 2023 Collabora, Ltd.
+ * Sebastian Fricke <sebastian.fricke@collabora.com>
+ *
+ * Copyright (C) 2019 Collabora, Ltd.
+ * Boris Brezillon <boris.brezillon@collabora.com>
+ *
+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd.
+ * Jeffy Chen <jeffy.chen@rock-chips.com>
+ */
+
+#include <media/v4l2-mem2mem.h>
+
+#include "rkvdec.h"
+#include "rkvdec-regs.h"
+#include "rkvdec-hevc-data.c"
+
+/* Size in u8/u32 units. */
+#define RKV_SCALING_LIST_SIZE 1360
+#define RKV_PPS_SIZE (80 / 4)
+#define RKV_PPS_LEN 64
+#define RKV_RPS_SIZE (32 / 4)
+#define RKV_RPS_LEN 600
+
+struct rkvdec_sps_pps_packet {
+ u32 info[RKV_PPS_SIZE];
+};
+
+struct rkvdec_rps_packet {
+ u32 info[RKV_RPS_SIZE];
+};
+
+struct rkvdec_ps_field {
+ u16 offset;
+ u8 len;
+};
+
+#define PS_FIELD(_offset, _len) \
+ ((struct rkvdec_ps_field){ _offset, _len })
+
+/* SPS */
+#define VIDEO_PARAMETER_SET_ID PS_FIELD(0, 4)
+#define SEQ_PARAMETER_SET_ID PS_FIELD(4, 4)
+#define CHROMA_FORMAT_IDC PS_FIELD(8, 2)
+#define PIC_WIDTH_IN_LUMA_SAMPLES PS_FIELD(10, 13)
+#define PIC_HEIGHT_IN_LUMA_SAMPLES PS_FIELD(23, 13)
+#define BIT_DEPTH_LUMA PS_FIELD(36, 4)
+#define BIT_DEPTH_CHROMA PS_FIELD(40, 4)
+#define LOG2_MAX_PIC_ORDER_CNT_LSB PS_FIELD(44, 5)
+#define LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE PS_FIELD(49, 2)
+#define LOG2_MIN_LUMA_CODING_BLOCK_SIZE PS_FIELD(51, 3)
+#define LOG2_MIN_TRANSFORM_BLOCK_SIZE PS_FIELD(54, 3)
+#define LOG2_DIFF_MAX_MIN_LUMA_TRANSFORM_BLOCK_SIZE PS_FIELD(57, 2)
+#define MAX_TRANSFORM_HIERARCHY_DEPTH_INTER PS_FIELD(59, 3)
+#define MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA PS_FIELD(62, 3)
+#define SCALING_LIST_ENABLED_FLAG PS_FIELD(65, 1)
+#define AMP_ENABLED_FLAG PS_FIELD(66, 1)
+#define SAMPLE_ADAPTIVE_OFFSET_ENABLED_FLAG PS_FIELD(67, 1)
+#define PCM_ENABLED_FLAG PS_FIELD(68, 1)
+#define PCM_SAMPLE_BIT_DEPTH_LUMA PS_FIELD(69, 4)
+#define PCM_SAMPLE_BIT_DEPTH_CHROMA PS_FIELD(73, 4)
+#define PCM_LOOP_FILTER_DISABLED_FLAG PS_FIELD(77, 1)
+#define LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE PS_FIELD(78, 3)
+#define LOG2_MIN_PCM_LUMA_CODING_BLOCK_SIZE PS_FIELD(81, 3)
+#define NUM_SHORT_TERM_REF_PIC_SETS PS_FIELD(84, 7)
+#define LONG_TERM_REF_PICS_PRESENT_FLAG PS_FIELD(91, 1)
+#define NUM_LONG_TERM_REF_PICS_SPS PS_FIELD(92, 6)
+#define SPS_TEMPORAL_MVP_ENABLED_FLAG PS_FIELD(98, 1)
+#define STRONG_INTRA_SMOOTHING_ENABLED_FLAG PS_FIELD(99, 1)
+/* PPS */
+#define PIC_PARAMETER_SET_ID PS_FIELD(128, 6)
+#define PPS_SEQ_PARAMETER_SET_ID PS_FIELD(134, 4)
+#define DEPENDENT_SLICE_SEGMENTS_ENABLED_FLAG PS_FIELD(138, 1)
+#define OUTPUT_FLAG_PRESENT_FLAG PS_FIELD(139, 1)
+#define NUM_EXTRA_SLICE_HEADER_BITS PS_FIELD(140, 13)
+#define SIGN_DATA_HIDING_ENABLED_FLAG PS_FIELD(153, 1)
+#define CABAC_INIT_PRESENT_FLAG PS_FIELD(154, 1)
+#define NUM_REF_IDX_L0_DEFAULT_ACTIVE PS_FIELD(155, 4)
+#define NUM_REF_IDX_L1_DEFAULT_ACTIVE PS_FIELD(159, 4)
+#define INIT_QP_MINUS26 PS_FIELD(163, 7)
+#define CONSTRAINED_INTRA_PRED_FLAG PS_FIELD(170, 1)
+#define TRANSFORM_SKIP_ENABLED_FLAG PS_FIELD(171, 1)
+#define CU_QP_DELTA_ENABLED_FLAG PS_FIELD(172, 1)
+#define LOG2_MIN_CU_QP_DELTA_SIZE PS_FIELD(173, 3)
+#define PPS_CB_QP_OFFSET PS_FIELD(176, 5)
+#define PPS_CR_QP_OFFSET PS_FIELD(181, 5)
+#define PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT_FLAG PS_FIELD(186, 1)
+#define WEIGHTED_PRED_FLAG PS_FIELD(187, 1)
+#define WEIGHTED_BIPRED_FLAG PS_FIELD(188, 1)
+#define TRANSQUANT_BYPASS_ENABLED_FLAG PS_FIELD(189, 1)
+#define TILES_ENABLED_FLAG PS_FIELD(190, 1)
+#define ENTROPY_CODING_SYNC_ENABLED_FLAG PS_FIELD(191, 1)
+#define PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED_FLAG PS_FIELD(192, 1)
+#define LOOP_FILTER_ACROSS_TILES_ENABLED_FLAG PS_FIELD(193, 1)
+#define DEBLOCKING_FILTER_OVERRIDE_ENABLED_FLAG PS_FIELD(194, 1)
+#define PPS_DEBLOCKING_FILTER_DISABLED_FLAG PS_FIELD(195, 1)
+#define PPS_BETA_OFFSET_DIV2 PS_FIELD(196, 4)
+#define PPS_TC_OFFSET_DIV2 PS_FIELD(200, 4)
+#define LISTS_MODIFICATION_PRESENT_FLAG PS_FIELD(204, 1)
+#define LOG2_PARALLEL_MERGE_LEVEL PS_FIELD(205, 3)
+#define SLICE_SEGMENT_HEADER_EXTENSION_PRESENT_FLAG PS_FIELD(208, 1)
+#define NUM_TILE_COLUMNS PS_FIELD(212, 5)
+#define NUM_TILE_ROWS PS_FIELD(217, 5)
+#define COLUMN_WIDTH(i) PS_FIELD(256 + ((i) * 8), 8)
+#define ROW_HEIGHT(i) PS_FIELD(416 + ((i) * 8), 8)
+#define SCALING_LIST_ADDRESS PS_FIELD(592, 32)
+
+/* Data structure describing auxiliary buffer format. */
+struct rkvdec_hevc_priv_tbl {
+ u8 cabac_table[RKV_CABAC_TABLE_SIZE];
+ u8 scaling_list[RKV_SCALING_LIST_SIZE];
+ struct rkvdec_sps_pps_packet param_set[RKV_PPS_LEN];
+ struct rkvdec_rps_packet rps[RKV_RPS_LEN];
+};
+
+struct rkvdec_hevc_run {
+ struct rkvdec_run base;
+ const struct v4l2_ctrl_hevc_slice_params *slices_params;
+ const struct v4l2_ctrl_hevc_decode_params *decode_params;
+ const struct v4l2_ctrl_hevc_sps *sps;
+ const struct v4l2_ctrl_hevc_pps *pps;
+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix;
+ int num_slices;
+};
+
+struct rkvdec_hevc_ctx {
+ struct rkvdec_aux_buf priv_tbl;
+ struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix_cache;
+};
+
+struct scaling_factor {
+ u8 scalingfactor0[1248];
+ u8 scalingfactor1[96]; /*4X4 TU Rotate, total 16X4*/
+ u8 scalingdc[12]; /*N1005 Vienna Meeting*/
+ u8 reserved[4]; /*16Bytes align*/
+};
+
+static void set_ps_field(u32 *buf, struct rkvdec_ps_field field, u32 value)
+{
+ u8 bit = field.offset % 32, word = field.offset / 32;
+ u64 mask = GENMASK_ULL(bit + field.len - 1, bit);
+ u64 val = ((u64)value << bit) & mask;
+
+ buf[word] &= ~mask;
+ buf[word] |= val;
+ if (bit + field.len > 32) {
+ buf[word + 1] &= ~(mask >> 32);
+ buf[word + 1] |= val >> 32;
+ }
+}
+
+static void assemble_hw_pps(struct rkvdec_ctx *ctx,
+ struct rkvdec_hevc_run *run)
+{
+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
+ const struct v4l2_ctrl_hevc_sps *sps = run->sps;
+ const struct v4l2_ctrl_hevc_pps *pps = run->pps;
+ struct rkvdec_hevc_priv_tbl *priv_tbl = hevc_ctx->priv_tbl.cpu;
+ struct rkvdec_sps_pps_packet *hw_ps;
+ u32 min_cb_log2_size_y, ctb_log2_size_y, ctb_size_y;
+ u32 log2_min_cu_qp_delta_size, scaling_distance;
+ dma_addr_t scaling_list_address;
+ int i;
+
+ /*
+ * HW read the SPS/PPS information from PPS packet index by PPS id.
+ * offset from the base can be calculated by PPS_id * 80 (size per PPS
+ * packet unit). so the driver copy SPS/PPS information to the exact PPS
+ * packet unit for HW accessing.
+ */
+ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id];
+ memset(hw_ps, 0, sizeof(*hw_ps));
+
+#define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value)
+ /* write sps */
+ WRITE_PPS(sps->video_parameter_set_id, VIDEO_PARAMETER_SET_ID);
+ WRITE_PPS(sps->seq_parameter_set_id, SEQ_PARAMETER_SET_ID);
+ WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC);
+ WRITE_PPS(sps->pic_width_in_luma_samples, PIC_WIDTH_IN_LUMA_SAMPLES);
+ WRITE_PPS(sps->pic_height_in_luma_samples, PIC_HEIGHT_IN_LUMA_SAMPLES);
+ WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA);
+ WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA);
+ WRITE_PPS(sps->log2_max_pic_order_cnt_lsb_minus4 + 4,
+ LOG2_MAX_PIC_ORDER_CNT_LSB);
+ WRITE_PPS(sps->log2_diff_max_min_luma_coding_block_size,
+ LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE);
+ WRITE_PPS(sps->log2_min_luma_coding_block_size_minus3 + 3,
+ LOG2_MIN_LUMA_CODING_BLOCK_SIZE);
+ WRITE_PPS(sps->log2_min_luma_transform_block_size_minus2 + 2,
+ LOG2_MIN_TRANSFORM_BLOCK_SIZE);
+ WRITE_PPS(sps->log2_diff_max_min_luma_transform_block_size,
+ LOG2_DIFF_MAX_MIN_LUMA_TRANSFORM_BLOCK_SIZE);
+ WRITE_PPS(sps->max_transform_hierarchy_depth_inter,
+ MAX_TRANSFORM_HIERARCHY_DEPTH_INTER);
+ WRITE_PPS(sps->max_transform_hierarchy_depth_intra,
+ MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED),
+ SCALING_LIST_ENABLED_FLAG);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_AMP_ENABLED),
+ AMP_ENABLED_FLAG);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET),
+ SAMPLE_ADAPTIVE_OFFSET_ENABLED_FLAG);
+ if (sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED) {
+ WRITE_PPS(1, PCM_ENABLED_FLAG);
+ WRITE_PPS(sps->pcm_sample_bit_depth_luma_minus1 + 1,
+ PCM_SAMPLE_BIT_DEPTH_LUMA);
+ WRITE_PPS(sps->pcm_sample_bit_depth_chroma_minus1 + 1,
+ PCM_SAMPLE_BIT_DEPTH_CHROMA);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED),
+ PCM_LOOP_FILTER_DISABLED_FLAG);
+ WRITE_PPS(sps->log2_diff_max_min_pcm_luma_coding_block_size,
+ LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE);
+ WRITE_PPS(sps->log2_min_pcm_luma_coding_block_size_minus3 + 3,
+ LOG2_MIN_PCM_LUMA_CODING_BLOCK_SIZE);
+ }
+ WRITE_PPS(sps->num_short_term_ref_pic_sets, NUM_SHORT_TERM_REF_PIC_SETS);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT),
+ LONG_TERM_REF_PICS_PRESENT_FLAG);
+ WRITE_PPS(sps->num_long_term_ref_pics_sps, NUM_LONG_TERM_REF_PICS_SPS);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED),
+ SPS_TEMPORAL_MVP_ENABLED_FLAG);
+ WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED),
+ STRONG_INTRA_SMOOTHING_ENABLED_FLAG);
+
+ /* write pps */
+ WRITE_PPS(pps->pic_parameter_set_id, PIC_PARAMETER_SET_ID);
+ WRITE_PPS(sps->seq_parameter_set_id, PPS_SEQ_PARAMETER_SET_ID);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED),
+ DEPENDENT_SLICE_SEGMENTS_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT),
+ OUTPUT_FLAG_PRESENT_FLAG);
+ WRITE_PPS(pps->num_extra_slice_header_bits, NUM_EXTRA_SLICE_HEADER_BITS);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED),
+ SIGN_DATA_HIDING_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT),
+ CABAC_INIT_PRESENT_FLAG);
+ WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1 + 1,
+ NUM_REF_IDX_L0_DEFAULT_ACTIVE);
+ WRITE_PPS(pps->num_ref_idx_l1_default_active_minus1 + 1,
+ NUM_REF_IDX_L1_DEFAULT_ACTIVE);
+ WRITE_PPS(pps->init_qp_minus26, INIT_QP_MINUS26);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED),
+ CONSTRAINED_INTRA_PRED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED),
+ TRANSFORM_SKIP_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED),
+ CU_QP_DELTA_ENABLED_FLAG);
+
+ min_cb_log2_size_y = sps->log2_min_luma_coding_block_size_minus3 + 3;
+ ctb_log2_size_y = min_cb_log2_size_y +
+ sps->log2_diff_max_min_luma_coding_block_size;
+ ctb_size_y = 1 << ctb_log2_size_y;
+ log2_min_cu_qp_delta_size = ctb_log2_size_y - pps->diff_cu_qp_delta_depth;
+ WRITE_PPS(log2_min_cu_qp_delta_size, LOG2_MIN_CU_QP_DELTA_SIZE);
+ WRITE_PPS(pps->pps_cb_qp_offset, PPS_CB_QP_OFFSET);
+ WRITE_PPS(pps->pps_cr_qp_offset, PPS_CR_QP_OFFSET);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT),
+ PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED),
+ WEIGHTED_PRED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED),
+ WEIGHTED_BIPRED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED),
+ TRANSQUANT_BYPASS_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED),
+ TILES_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED),
+ ENTROPY_CODING_SYNC_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED),
+ PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED),
+ LOOP_FILTER_ACROSS_TILES_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED),
+ DEBLOCKING_FILTER_OVERRIDE_ENABLED_FLAG);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER),
+ PPS_DEBLOCKING_FILTER_DISABLED_FLAG);
+ WRITE_PPS(pps->pps_beta_offset_div2, PPS_BETA_OFFSET_DIV2);
+ WRITE_PPS(pps->pps_tc_offset_div2, PPS_TC_OFFSET_DIV2);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT),
+ LISTS_MODIFICATION_PRESENT_FLAG);
+ WRITE_PPS(pps->log2_parallel_merge_level_minus2 + 2, LOG2_PARALLEL_MERGE_LEVEL);
+ WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT),
+ SLICE_SEGMENT_HEADER_EXTENSION_PRESENT_FLAG);
+ WRITE_PPS(pps->num_tile_columns_minus1 + 1, NUM_TILE_COLUMNS);
+ WRITE_PPS(pps->num_tile_rows_minus1 + 1, NUM_TILE_ROWS);
+
+ if (pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) {
+ /* Userspace also provide column width and row height for uniform spacing */
+ for (i = 0; i <= pps->num_tile_columns_minus1; i++)
+ WRITE_PPS(pps->column_width_minus1[i], COLUMN_WIDTH(i));
+ for (i = 0; i <= pps->num_tile_rows_minus1; i++)
+ WRITE_PPS(pps->row_height_minus1[i], ROW_HEIGHT(i));
+ } else {
+ WRITE_PPS(((sps->pic_width_in_luma_samples + ctb_size_y - 1) / ctb_size_y) - 1,
+ COLUMN_WIDTH(0));
+ WRITE_PPS(((sps->pic_height_in_luma_samples + ctb_size_y - 1) / ctb_size_y) - 1,
+ ROW_HEIGHT(0));
+ }
+
+ scaling_distance = offsetof(struct rkvdec_hevc_priv_tbl, scaling_list);
+ scaling_list_address = hevc_ctx->priv_tbl.dma + scaling_distance;
+ WRITE_PPS(scaling_list_address, SCALING_LIST_ADDRESS);
+}
+
+/*
+ * Creation of the Reference Picture Set memory blob for the hardware.
+ * The layout looks like this:
+ * [0] 32 bits for L0 (6 references + 2 bits of the 7th reference)
+ * [1] 32 bits for L0 (remaining 3 bits of the 7th reference + 5 references
+ * + 4 bits of the 13th reference)
+ * [2] 11 bits for L0 (remaining bit for 13 and 2 references) and
+ * 21 bits for L1 (4 references + first bit of 5)
+ * [3] 32 bits of padding with 0s
+ * [4] 32 bits for L1 (remaining 4 bits for 5 + 5 references + 3 bits of 11)
+ * [5] 22 bits for L1 (remaining 2 bits of 11 and 4 references)
+ * lowdelay flag (bit 23), rps bit offset long term (bit 24 - 32)
+ * [6] rps bit offset long term (bit 1 - 3), rps bit offset short term (bit 4 - 12)
+ * number of references (bit 13 - 16), remaining 16 bits of padding with 0s
+ * [7] 32 bits of padding with 0s
+ *
+ * Thus we have to set up padding in between reference 5 of the L1 list.
+ */
+static void assemble_sw_rps(struct rkvdec_ctx *ctx,
+ struct rkvdec_hevc_run *run)
+{
+ const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params;
+ const struct v4l2_ctrl_hevc_sps *sps = run->sps;
+ const struct v4l2_ctrl_hevc_slice_params *sl_params;
+ const struct v4l2_hevc_dpb_entry *dpb;
+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
+ struct rkvdec_hevc_priv_tbl *priv_tbl = hevc_ctx->priv_tbl.cpu;
+ struct rkvdec_rps_packet *hw_ps;
+ int i, j;
+ unsigned int lowdelay;
+
+#define WRITE_RPS(value, field) set_ps_field(hw_ps->info, field, value)
+
+#define REF_PIC_LONG_TERM_L0(i) PS_FIELD((i) * 5, 1)
+#define REF_PIC_IDX_L0(i) PS_FIELD(1 + ((i) * 5), 4)
+#define REF_PIC_LONG_TERM_L1(i) PS_FIELD(((i) < 5 ? 75 : 132) + ((i) * 5), 1)
+#define REF_PIC_IDX_L1(i) PS_FIELD(((i) < 4 ? 76 : 128) + ((i) * 5), 4)
+
+#define LOWDELAY PS_FIELD(182, 1)
+#define LONG_TERM_RPS_BIT_OFFSET PS_FIELD(183, 10)
+#define SHORT_TERM_RPS_BIT_OFFSET PS_FIELD(193, 9)
+#define NUM_RPS_POC PS_FIELD(202, 4)
+
+ for (j = 0; j < run->num_slices; j++) {
+ uint st_bit_offset = 0;
+ uint num_l0_refs = 0;
+ uint num_l1_refs = 0;
+
+ sl_params = &run->slices_params[j];
+ dpb = decode_params->dpb;
+
+ if (sl_params->slice_type != V4L2_HEVC_SLICE_TYPE_I) {
+ num_l0_refs = sl_params->num_ref_idx_l0_active_minus1 + 1;
+
+ if (sl_params->slice_type == V4L2_HEVC_SLICE_TYPE_B)
+ num_l1_refs = sl_params->num_ref_idx_l1_active_minus1 + 1;
+
+ lowdelay = 1;
+ } else {
+ lowdelay = 0;
+ }
+
+ hw_ps = &priv_tbl->rps[j];
+ memset(hw_ps, 0, sizeof(*hw_ps));
+
+ for (i = 0; i < num_l0_refs; i++) {
+ const struct v4l2_hevc_dpb_entry dpb_l0 = dpb[sl_params->ref_idx_l0[i]];
+
+ WRITE_RPS(!!(dpb_l0.flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE),
+ REF_PIC_LONG_TERM_L0(i));
+ WRITE_RPS(sl_params->ref_idx_l0[i], REF_PIC_IDX_L0(i));
+
+ if (dpb_l0.pic_order_cnt_val > sl_params->slice_pic_order_cnt)
+ lowdelay = 0;
+ }
+
+ for (i = 0; i < num_l1_refs; i++) {
+ const struct v4l2_hevc_dpb_entry dpb_l1 = dpb[sl_params->ref_idx_l1[i]];
+ int is_long_term =
+ !!(dpb_l1.flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE);
+
+ WRITE_RPS(is_long_term, REF_PIC_LONG_TERM_L1(i));
+ WRITE_RPS(sl_params->ref_idx_l1[i], REF_PIC_IDX_L1(i));
+
+ if (dpb_l1.pic_order_cnt_val > sl_params->slice_pic_order_cnt)
+ lowdelay = 0;
+ }
+
+ WRITE_RPS(lowdelay, LOWDELAY);
+
+ if (!(decode_params->flags & V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC)) {
+ if (sl_params->short_term_ref_pic_set_size)
+ st_bit_offset = sl_params->short_term_ref_pic_set_size;
+ else if (sps->num_short_term_ref_pic_sets > 1)
+ st_bit_offset = fls(sps->num_short_term_ref_pic_sets - 1);
+ }
+
+ WRITE_RPS(st_bit_offset + sl_params->long_term_ref_pic_set_size,
+ LONG_TERM_RPS_BIT_OFFSET);
+ WRITE_RPS(sl_params->short_term_ref_pic_set_size,
+ SHORT_TERM_RPS_BIT_OFFSET);
+
+ WRITE_RPS(decode_params->num_poc_st_curr_before +
+ decode_params->num_poc_st_curr_after +
+ decode_params->num_poc_lt_curr,
+ NUM_RPS_POC);
+ }
+}
+
+/*
+ * Flip one or more matrices along their main diagonal and flatten them
+ * before writing it to the memory.
+ * Convert:
+ * ABCD AEIM
+ * EFGH => BFJN => AEIMBFJNCGKODHLP
+ * IJKL CGKO
+ * MNOP DHLP
+ */
+static void transpose_and_flatten_matrices(u8 *output, const u8 *input,
+ int matrices, int row_length)
+{
+ int i, j, row, x_offset, matrix_offset, rot_index, y_offset, matrix_size, new_value;
+
+ matrix_size = row_length * row_length;
+ for (i = 0; i < matrices; i++) {
+ row = 0;
+ x_offset = 0;
+ matrix_offset = i * matrix_size;
+ for (j = 0; j < matrix_size; j++) {
+ y_offset = j - (row * row_length);
+ rot_index = y_offset * row_length + x_offset;
+ new_value = *(input + i * matrix_size + j);
+ output[matrix_offset + rot_index] = new_value;
+ if ((j + 1) % row_length == 0) {
+ row += 1;
+ x_offset += 1;
+ }
+ }
+ }
+}
+
+static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
+{
+ int offset = 0;
+
+ transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4);
+ offset = 6 * 16 * sizeof(u8);
+ transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8);
+ offset += 6 * 64 * sizeof(u8);
+ transpose_and_flatten_matrices(output + offset,
+ (const u8 *)input->scaling_list_16x16, 6, 8);
+ offset += 6 * 64 * sizeof(u8);
+ /* Add a 128 byte padding with 0s between the two 32x32 matrices */
+ transpose_and_flatten_matrices(output + offset,
+ (const u8 *)input->scaling_list_32x32, 1, 8);
+ offset += 64 * sizeof(u8);
+ memset(output + offset, 0, 128);
+ offset += 128 * sizeof(u8);
+ transpose_and_flatten_matrices(output + offset,
+ (const u8 *)input->scaling_list_32x32 + (64 * sizeof(u8)),
+ 1, 8);
+ offset += 64 * sizeof(u8);
+ memset(output + offset, 0, 128);
+}
+
+/*
+ * Required layout:
+ * A = scaling_list_dc_coef_16x16
+ * B = scaling_list_dc_coef_32x32
+ * 0 = Padding
+ *
+ * A, A, A, A, A, A, B, 0, 0, B, 0, 0
+ */
+static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input)
+{
+ u8 list_32x32[6] = {0};
+
+ memcpy(output, input->scaling_list_dc_coef_16x16, 6 * sizeof(u8));
+ list_32x32[0] = input->scaling_list_dc_coef_32x32[0];
+ list_32x32[3] = input->scaling_list_dc_coef_32x32[1];
+ memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8));
+}
+
+static void translate_scaling_list(struct scaling_factor *output,
+ const struct v4l2_ctrl_hevc_scaling_matrix *input)
+{
+ assemble_scalingfactor0(output->scalingfactor0, input);
+ memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96);
+ assemble_scalingdc(output->scalingdc, input);
+ memset(output->reserved, 0, 4 * sizeof(u8));
+}
+
+static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx,
+ struct rkvdec_hevc_run *run)
+{
+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix;
+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
+ struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu;
+ u8 *dst;
+
+ if (!memcmp((void *)&hevc_ctx->scaling_matrix_cache, scaling,
+ sizeof(struct v4l2_ctrl_hevc_scaling_matrix)))
+ return;
+
+ dst = tbl->scaling_list;
+ translate_scaling_list((struct scaling_factor *)dst, scaling);
+
+ memcpy((void *)&hevc_ctx->scaling_matrix_cache, scaling,
+ sizeof(struct v4l2_ctrl_hevc_scaling_matrix));
+}
+
+static struct vb2_buffer *
+get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run,
+ unsigned int dpb_idx)
+{
+ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
+ const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params;
+ const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb;
+ struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q;
+ struct vb2_buffer *buf = NULL;
+
+ if (dpb_idx < decode_params->num_active_dpb_entries)
+ buf = vb2_find_buffer(cap_q, dpb[dpb_idx].timestamp);
+
+ /*
+ * If a DPB entry is unused or invalid, the address of current destination
+ * buffer is returned.
+ */
+ if (!buf)
+ return &run->base.bufs.dst->vb2_buf;
+
+ return buf;
+}
+
+static void config_registers(struct rkvdec_ctx *ctx,
+ struct rkvdec_hevc_run *run)
+{
+ struct rkvdec_dev *rkvdec = ctx->dev;
+ const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params;
+ const struct v4l2_ctrl_hevc_sps *sps = run->sps;
+ const struct v4l2_ctrl_hevc_slice_params *sl_params = &run->slices_params[0];
+ const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb;
+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
+ dma_addr_t priv_start_addr = hevc_ctx->priv_tbl.dma;
+ const struct v4l2_pix_format_mplane *dst_fmt;
+ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src;
+ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst;
+ const struct v4l2_format *f;
+ dma_addr_t rlc_addr;
+ dma_addr_t refer_addr;
+ u32 rlc_len;
+ u32 hor_virstride;
+ u32 ver_virstride;
+ u32 y_virstride;
+ u32 yuv_virstride = 0;
+ u32 offset;
+ dma_addr_t dst_addr;
+ u32 reg, i;
+
+ reg = RKVDEC_MODE(RKVDEC_MODE_HEVC);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_SYSCTRL);
+
+ f = &ctx->decoded_fmt;
+ dst_fmt = &f->fmt.pix_mp;
+ hor_virstride = dst_fmt->plane_fmt[0].bytesperline;
+ ver_virstride = dst_fmt->height;
+ y_virstride = hor_virstride * ver_virstride;
+
+ if (sps->chroma_format_idc == 0)
+ yuv_virstride = y_virstride;
+ else if (sps->chroma_format_idc == 1)
+ yuv_virstride = y_virstride + y_virstride / 2;
+ else if (sps->chroma_format_idc == 2)
+ yuv_virstride = 2 * y_virstride;
+
+ reg = RKVDEC_Y_HOR_VIRSTRIDE(hor_virstride / 16) |
+ RKVDEC_UV_HOR_VIRSTRIDE(hor_virstride / 16) |
+ RKVDEC_SLICE_NUM_LOWBITS(run->num_slices);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_PICPAR);
+
+ /* config rlc base address */
+ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
+ writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE);
+
+ rlc_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
+ reg = RKVDEC_STRM_LEN(round_up(rlc_len, 16) + 64);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_STRM_LEN);
+
+ /* config cabac table */
+ offset = offsetof(struct rkvdec_hevc_priv_tbl, cabac_table);
+ writel_relaxed(priv_start_addr + offset,
+ rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE);
+
+ /* config output base address */
+ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
+ writel_relaxed(dst_addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE);
+
+ reg = RKVDEC_Y_VIRSTRIDE(y_virstride / 16);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE);
+
+ reg = RKVDEC_YUV_VIRSTRIDE(yuv_virstride / 16);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE);
+
+ /* config ref pic address */
+ for (i = 0; i < 15; i++) {
+ struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i);
+
+ if (i < 4 && decode_params->num_active_dpb_entries) {
+ reg = GENMASK(decode_params->num_active_dpb_entries - 1, 0);
+ reg = (reg >> (i * 4)) & 0xf;
+ } else {
+ reg = 0;
+ }
+
+ refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0);
+ writel_relaxed(refer_addr | reg,
+ rkvdec->regs + RKVDEC_REG_H264_BASE_REFER(i));
+
+ reg = RKVDEC_POC_REFER(i < decode_params->num_active_dpb_entries ?
+ dpb[i].pic_order_cnt_val : 0);
+ writel_relaxed(reg,
+ rkvdec->regs + RKVDEC_REG_H264_POC_REFER0(i));
+ }
+
+ reg = RKVDEC_CUR_POC(sl_params->slice_pic_order_cnt);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC0);
+
+ /* config hw pps address */
+ offset = offsetof(struct rkvdec_hevc_priv_tbl, param_set);
+ writel_relaxed(priv_start_addr + offset,
+ rkvdec->regs + RKVDEC_REG_PPS_BASE);
+
+ /* config hw rps address */
+ offset = offsetof(struct rkvdec_hevc_priv_tbl, rps);
+ writel_relaxed(priv_start_addr + offset,
+ rkvdec->regs + RKVDEC_REG_RPS_BASE);
+
+ reg = RKVDEC_AXI_DDR_RDATA(0);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_RDATA);
+
+ reg = RKVDEC_AXI_DDR_WDATA(0);
+ writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_WDATA);
+}
+
+#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2
+
+static int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx,
+ struct v4l2_format *f)
+{
+ struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp;
+
+ fmt->num_planes = 1;
+ if (!fmt->plane_fmt[0].sizeimage)
+ fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height *
+ RKVDEC_HEVC_MAX_DEPTH_IN_BYTES;
+ return 0;
+}
+
+static enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx,
+ struct v4l2_ctrl *ctrl)
+{
+ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
+
+ if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS)
+ return RKVDEC_IMG_FMT_ANY;
+
+ if (sps->bit_depth_luma_minus8 == 0) {
+ if (sps->chroma_format_idc == 2)
+ return RKVDEC_IMG_FMT_422_8BIT;
+ else
+ return RKVDEC_IMG_FMT_420_8BIT;
+ } else if (sps->bit_depth_luma_minus8 == 2) {
+ if (sps->chroma_format_idc == 2)
+ return RKVDEC_IMG_FMT_422_10BIT;
+ else
+ return RKVDEC_IMG_FMT_420_10BIT;
+ }
+
+ return RKVDEC_IMG_FMT_ANY;
+}
+
+static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx,
+ const struct v4l2_ctrl_hevc_sps *sps)
+{
+ if (sps->chroma_format_idc > 1)
+ /* Only 4:0:0 and 4:2:0 are supported */
+ return -EINVAL;
+ if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
+ /* Luma and chroma bit depth mismatch */
+ return -EINVAL;
+ if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
+ /* Only 8-bit and 10-bit is supported */
+ return -EINVAL;
+
+ if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width ||
+ sps->pic_height_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.height)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int rkvdec_hevc_start(struct rkvdec_ctx *ctx)
+{
+ struct rkvdec_dev *rkvdec = ctx->dev;
+ struct rkvdec_hevc_priv_tbl *priv_tbl;
+ struct rkvdec_hevc_ctx *hevc_ctx;
+
+ hevc_ctx = kzalloc(sizeof(*hevc_ctx), GFP_KERNEL);
+ if (!hevc_ctx)
+ return -ENOMEM;
+
+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl),
+ &hevc_ctx->priv_tbl.dma, GFP_KERNEL);
+ if (!priv_tbl) {
+ kfree(hevc_ctx);
+ return -ENOMEM;
+ }
+
+ hevc_ctx->priv_tbl.size = sizeof(*priv_tbl);
+ hevc_ctx->priv_tbl.cpu = priv_tbl;
+ memcpy(priv_tbl->cabac_table, rkvdec_hevc_cabac_table,
+ sizeof(rkvdec_hevc_cabac_table));
+
+ ctx->priv = hevc_ctx;
+ return 0;
+}
+
+static void rkvdec_hevc_stop(struct rkvdec_ctx *ctx)
+{
+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv;
+ struct rkvdec_dev *rkvdec = ctx->dev;
+
+ dma_free_coherent(rkvdec->dev, hevc_ctx->priv_tbl.size,
+ hevc_ctx->priv_tbl.cpu, hevc_ctx->priv_tbl.dma);
+ kfree(hevc_ctx);
+}
+
+static void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx,
+ struct rkvdec_hevc_run *run)
+{
+ struct v4l2_ctrl *ctrl;
+
+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
+ V4L2_CID_STATELESS_HEVC_DECODE_PARAMS);
+ run->decode_params = ctrl ? ctrl->p_cur.p : NULL;
+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
+ V4L2_CID_STATELESS_HEVC_SLICE_PARAMS);
+ run->slices_params = ctrl ? ctrl->p_cur.p : NULL;
+ run->num_slices = ctrl ? ctrl->new_elems : 0;
+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
+ V4L2_CID_STATELESS_HEVC_SPS);
+ run->sps = ctrl ? ctrl->p_cur.p : NULL;
+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
+ V4L2_CID_STATELESS_HEVC_PPS);
+ run->pps = ctrl ? ctrl->p_cur.p : NULL;
+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
+ V4L2_CID_STATELESS_HEVC_SCALING_MATRIX);
+ run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL;
+
+ rkvdec_run_preamble(ctx, &run->base);
+}
+
+static int rkvdec_hevc_run(struct rkvdec_ctx *ctx)
+{
+ struct rkvdec_dev *rkvdec = ctx->dev;
+ struct rkvdec_hevc_run run;
+ u32 reg;
+
+ rkvdec_hevc_run_preamble(ctx, &run);
+
+ assemble_hw_scaling_list(ctx, &run);
+ assemble_hw_pps(ctx, &run);
+ assemble_sw_rps(ctx, &run);
+ config_registers(ctx, &run);
+
+ rkvdec_run_postamble(ctx, &run.base);
+
+ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000));
+
+ writel(0, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN);
+ writel(0, rkvdec->regs + RKVDEC_REG_H264_ERR_E);
+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND);
+ writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
+
+ /* Start decoding! */
+ reg = (run.pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) ?
+ 0 : RKVDEC_WR_DDR_ALIGN_EN;
+ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E |
+ RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E | reg,
+ rkvdec->regs + RKVDEC_REG_INTERRUPT);
+
+ return 0;
+}
+
+static int rkvdec_hevc_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl)
+{
+ if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS)
+ return rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps);
+
+ return 0;
+}
+
+const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops = {
+ .adjust_fmt = rkvdec_hevc_adjust_fmt,
+ .start = rkvdec_hevc_start,
+ .stop = rkvdec_hevc_stop,
+ .run = rkvdec_hevc_run,
+ .try_ctrl = rkvdec_hevc_try_ctrl,
+ .get_image_fmt = rkvdec_hevc_get_image_fmt,
+};
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
index 15b9bee92016..540c8bdf24e4 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
@@ -28,6 +28,7 @@
#define RKVDEC_SOFTRST_EN_P BIT(20)
#define RKVDEC_FORCE_SOFTRESET_VALID BIT(21)
#define RKVDEC_SOFTRESET_RDY BIT(22)
+#define RKVDEC_WR_DDR_ALIGN_EN BIT(23)
#define RKVDEC_REG_SYSCTRL 0x008
#define RKVDEC_IN_ENDIAN BIT(0)
@@ -43,6 +44,7 @@
#define RKVDEC_RLC_MODE BIT(11)
#define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12)
#define RKVDEC_MODE(x) (((x) & 0x03) << 20)
+#define RKVDEC_MODE_HEVC 0
#define RKVDEC_MODE_H264 1
#define RKVDEC_MODE_VP9 2
#define RKVDEC_RPS_MODE BIT(24)
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
index 9fa80ab3c62b..c15fc238d6af 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
@@ -158,6 +158,67 @@ static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = {
.s_ctrl = rkvdec_s_ctrl,
};
+static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_SLICE_PARAMS,
+ .cfg.flags = V4L2_CTRL_FLAG_DYNAMIC_ARRAY,
+ .cfg.type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS,
+ .cfg.dims = { 600 },
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_SPS,
+ .cfg.ops = &rkvdec_ctrl_ops,
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_PPS,
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX,
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS,
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE,
+ .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
+ .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
+ .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED,
+ },
+ {
+ .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE,
+ .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
+ .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
+ .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B,
+ },
+ {
+ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
+ .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
+ .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
+ },
+ {
+ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
+ .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
+ .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1,
+ },
+};
+
+static const struct rkvdec_ctrls rkvdec_hevc_ctrls = {
+ .ctrls = rkvdec_hevc_ctrl_descs,
+ .num_ctrls = ARRAY_SIZE(rkvdec_hevc_ctrl_descs),
+};
+
+static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .image_fmt = RKVDEC_IMG_FMT_420_8BIT,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_NV15,
+ .image_fmt = RKVDEC_IMG_FMT_420_10BIT,
+ },
+};
+
static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
{
.cfg.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS,
@@ -252,6 +313,21 @@ static const struct rkvdec_decoded_fmt_desc rkvdec_vp9_decoded_fmts[] = {
};
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_HEVC_SLICE,
+ .frmsize = {
+ .min_width = 64,
+ .max_width = 4096,
+ .step_width = 64,
+ .min_height = 64,
+ .max_height = 2304,
+ .step_height = 16,
+ },
+ .ctrls = &rkvdec_hevc_ctrls,
+ .ops = &rkvdec_hevc_fmt_ops,
+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
+ .decoded_fmts = rkvdec_hevc_decoded_fmts,
+ },
{
.fourcc = V4L2_PIX_FMT_H264_SLICE,
.frmsize = {
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
index 481aaa4bffe9..209dd79ce9bd 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
@@ -139,6 +139,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops;
+extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops;
extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops;
#endif /* RKVDEC_H_ */
--
2.51.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 2/7] media: rkvdec: Add variants support
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 1/7] " Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-08 18:32 ` Detlev Casanova
2025-09-05 16:19 ` [PATCH v3 3/7] media: rkvdec: Implement capability filtering Jonas Karlman
` (7 subsequent siblings)
9 siblings, 1 reply; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
From: Alex Bee <knaerzche@gmail.com>
Different versions of the Rockchip VDEC IP exists and one way they can
differ is what decoding formats are supported.
Add a variant implementation in order to support flagging different
capabilities.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Use a reference to rkvdec_variant
- Add num_regs field
- Collect r-b tag
Changes in v2:
- No change
---
.../media/platform/rockchip/rkvdec/rkvdec.c | 22 ++++++++++++++++++-
.../media/platform/rockchip/rkvdec/rkvdec.h | 11 ++++++++++
2 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
index c15fc238d6af..daf6d9ab2d1d 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
@@ -14,6 +14,7 @@
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
@@ -327,6 +328,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
.ops = &rkvdec_hevc_fmt_ops,
.num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
.decoded_fmts = rkvdec_hevc_decoded_fmts,
+ .capability = RKVDEC_CAPABILITY_HEVC,
},
{
.fourcc = V4L2_PIX_FMT_H264_SLICE,
@@ -343,6 +345,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
.decoded_fmts = rkvdec_h264_decoded_fmts,
.subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
+ .capability = RKVDEC_CAPABILITY_H264,
},
{
.fourcc = V4L2_PIX_FMT_VP9_FRAME,
@@ -358,6 +361,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
.ops = &rkvdec_vp9_fmt_ops,
.num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
.decoded_fmts = rkvdec_vp9_decoded_fmts,
+ .capability = RKVDEC_CAPABILITY_VP9,
}
};
@@ -1186,8 +1190,18 @@ static void rkvdec_watchdog_func(struct work_struct *work)
}
}
+static const struct rkvdec_variant rk3399_rkvdec_variant = {
+ .num_regs = 78,
+ .capabilities = RKVDEC_CAPABILITY_HEVC |
+ RKVDEC_CAPABILITY_H264 |
+ RKVDEC_CAPABILITY_VP9,
+};
+
static const struct of_device_id of_rkvdec_match[] = {
- { .compatible = "rockchip,rk3399-vdec" },
+ {
+ .compatible = "rockchip,rk3399-vdec",
+ .data = &rk3399_rkvdec_variant,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, of_rkvdec_match);
@@ -1198,16 +1212,22 @@ static const char * const rkvdec_clk_names[] = {
static int rkvdec_probe(struct platform_device *pdev)
{
+ const struct rkvdec_variant *variant;
struct rkvdec_dev *rkvdec;
unsigned int i;
int ret, irq;
+ variant = of_device_get_match_data(&pdev->dev);
+ if (!variant)
+ return -EINVAL;
+
rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL);
if (!rkvdec)
return -ENOMEM;
platform_set_drvdata(pdev, rkvdec);
rkvdec->dev = &pdev->dev;
+ rkvdec->variant = variant;
mutex_init(&rkvdec->vdev_lock);
INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func);
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
index 209dd79ce9bd..c47457c954e5 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
@@ -22,6 +22,10 @@
#include <media/videobuf2-core.h>
#include <media/videobuf2-dma-contig.h>
+#define RKVDEC_CAPABILITY_HEVC BIT(0)
+#define RKVDEC_CAPABILITY_H264 BIT(1)
+#define RKVDEC_CAPABILITY_VP9 BIT(2)
+
struct rkvdec_ctx;
struct rkvdec_ctrl_desc {
@@ -63,6 +67,11 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
base.vb.vb2_buf);
}
+struct rkvdec_variant {
+ unsigned int num_regs;
+ unsigned int capabilities;
+};
+
struct rkvdec_coded_fmt_ops {
int (*adjust_fmt)(struct rkvdec_ctx *ctx,
struct v4l2_format *f);
@@ -98,6 +107,7 @@ struct rkvdec_coded_fmt_desc {
unsigned int num_decoded_fmts;
const struct rkvdec_decoded_fmt_desc *decoded_fmts;
u32 subsystem_flags;
+ unsigned int capability;
};
struct rkvdec_dev {
@@ -111,6 +121,7 @@ struct rkvdec_dev {
struct mutex vdev_lock; /* serializes ioctls */
struct delayed_work watchdog_work;
struct iommu_domain *empty_domain;
+ const struct rkvdec_variant *variant;
};
struct rkvdec_ctx {
--
2.51.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 3/7] media: rkvdec: Implement capability filtering
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 1/7] " Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 2/7] media: rkvdec: Add variants support Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 4/7] media: rkvdec: Add RK3288 variant Jonas Karlman
` (6 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
Add filtering of coded formats and controls depending on a variant
capabilities.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Change to use file_to_rkvdec_ctx()
- Use capabilities from rkvdec_variant
- Collect r-b tag
Changes in v2:
- Adjust code style in rkvdec_enum_coded_fmt_desc()
---
.../media/platform/rockchip/rkvdec/rkvdec.c | 67 ++++++++++++++-----
1 file changed, 49 insertions(+), 18 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
index daf6d9ab2d1d..088ddfadf995 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
@@ -365,13 +365,36 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
}
};
+static bool rkvdec_is_capable(struct rkvdec_ctx *ctx, unsigned int capability)
+{
+ return (ctx->dev->variant->capabilities & capability) == capability;
+}
+
static const struct rkvdec_coded_fmt_desc *
-rkvdec_find_coded_fmt_desc(u32 fourcc)
+rkvdec_enum_coded_fmt_desc(struct rkvdec_ctx *ctx, int index)
{
+ int fmt_idx = -1;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) {
- if (rkvdec_coded_fmts[i].fourcc == fourcc)
+ if (!rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability))
+ continue;
+ fmt_idx++;
+ if (index == fmt_idx)
+ return &rkvdec_coded_fmts[i];
+ }
+
+ return NULL;
+}
+
+static const struct rkvdec_coded_fmt_desc *
+rkvdec_find_coded_fmt_desc(struct rkvdec_ctx *ctx, u32 fourcc)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) {
+ if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability) &&
+ rkvdec_coded_fmts[i].fourcc == fourcc)
return &rkvdec_coded_fmts[i];
}
@@ -382,7 +405,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
{
struct v4l2_format *f = &ctx->coded_fmt;
- ctx->coded_fmt_desc = &rkvdec_coded_fmts[0];
+ ctx->coded_fmt_desc = rkvdec_enum_coded_fmt_desc(ctx, 0);
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc);
f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
@@ -396,21 +419,22 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
static int rkvdec_enum_framesizes(struct file *file, void *priv,
struct v4l2_frmsizeenum *fsize)
{
- const struct rkvdec_coded_fmt_desc *fmt;
+ struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file);
+ const struct rkvdec_coded_fmt_desc *desc;
if (fsize->index != 0)
return -EINVAL;
- fmt = rkvdec_find_coded_fmt_desc(fsize->pixel_format);
- if (!fmt)
+ desc = rkvdec_find_coded_fmt_desc(ctx, fsize->pixel_format);
+ if (!desc)
return -EINVAL;
fsize->type = V4L2_FRMSIZE_TYPE_CONTINUOUS;
fsize->stepwise.min_width = 1;
- fsize->stepwise.max_width = fmt->frmsize.max_width;
+ fsize->stepwise.max_width = desc->frmsize.max_width;
fsize->stepwise.step_width = 1;
fsize->stepwise.min_height = 1;
- fsize->stepwise.max_height = fmt->frmsize.max_height;
+ fsize->stepwise.max_height = desc->frmsize.max_height;
fsize->stepwise.step_height = 1;
return 0;
@@ -470,10 +494,10 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv,
struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file);
const struct rkvdec_coded_fmt_desc *desc;
- desc = rkvdec_find_coded_fmt_desc(pix_mp->pixelformat);
+ desc = rkvdec_find_coded_fmt_desc(ctx, pix_mp->pixelformat);
if (!desc) {
- pix_mp->pixelformat = rkvdec_coded_fmts[0].fourcc;
- desc = &rkvdec_coded_fmts[0];
+ desc = rkvdec_enum_coded_fmt_desc(ctx, 0);
+ pix_mp->pixelformat = desc->fourcc;
}
v4l2_apply_frmsize_constraints(&pix_mp->width,
@@ -550,7 +574,7 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
if (ret)
return ret;
- desc = rkvdec_find_coded_fmt_desc(f->fmt.pix_mp.pixelformat);
+ desc = rkvdec_find_coded_fmt_desc(ctx, f->fmt.pix_mp.pixelformat);
if (!desc)
return -EINVAL;
ctx->coded_fmt_desc = desc;
@@ -602,10 +626,14 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv,
static int rkvdec_enum_output_fmt(struct file *file, void *priv,
struct v4l2_fmtdesc *f)
{
- if (f->index >= ARRAY_SIZE(rkvdec_coded_fmts))
+ struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file);
+ const struct rkvdec_coded_fmt_desc *desc;
+
+ desc = rkvdec_enum_coded_fmt_desc(ctx, f->index);
+ if (!desc)
return -EINVAL;
- f->pixelformat = rkvdec_coded_fmts[f->index].fourcc;
+ f->pixelformat = desc->fourcc;
return 0;
}
@@ -970,14 +998,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
int ret;
for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++)
- nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls;
+ if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability))
+ nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls;
v4l2_ctrl_handler_init(&ctx->ctrl_hdl, nctrls);
for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) {
- ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls);
- if (ret)
- goto err_free_handler;
+ if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability)) {
+ ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls);
+ if (ret)
+ goto err_free_handler;
+ }
}
ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
--
2.51.0
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 4/7] media: rkvdec: Add RK3288 variant
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (2 preceding siblings ...)
2025-09-05 16:19 ` [PATCH v3 3/7] media: rkvdec: Implement capability filtering Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 5/7] media: rkvdec: Disable QoS for HEVC and VP9 on RK3328 Jonas Karlman
` (5 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
From: Alex Bee <knaerzche@gmail.com>
Add a RK3288 variant, a version of the Rockchip VDEC IP that only
support HEVC decoding.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Add num_regs field
- Collect r-b tag
Changes in v2:
- No change
---
drivers/media/platform/rockchip/rkvdec/rkvdec.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
index 088ddfadf995..f8cbc7bcfa15 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
@@ -1221,6 +1221,11 @@ static void rkvdec_watchdog_func(struct work_struct *work)
}
}
+static const struct rkvdec_variant rk3288_rkvdec_variant = {
+ .num_regs = 68,
+ .capabilities = RKVDEC_CAPABILITY_HEVC,
+};
+
static const struct rkvdec_variant rk3399_rkvdec_variant = {
.num_regs = 78,
.capabilities = RKVDEC_CAPABILITY_HEVC |
@@ -1229,6 +1234,10 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
};
static const struct of_device_id of_rkvdec_match[] = {
+ {
+ .compatible = "rockchip,rk3288-vdec",
+ .data = &rk3288_rkvdec_variant,
+ },
{
.compatible = "rockchip,rk3399-vdec",
.data = &rk3399_rkvdec_variant,
--
2.51.0
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 5/7] media: rkvdec: Disable QoS for HEVC and VP9 on RK3328
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (3 preceding siblings ...)
2025-09-05 16:19 ` [PATCH v3 4/7] media: rkvdec: Add RK3288 variant Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 6/7] media: dt-bindings: rockchip,vdec: Add RK3288 compatible Jonas Karlman
` (4 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
From: Alex Bee <knaerzche@gmail.com>
The RK3328 VDEC has a HW quirk that require QoS to be disabled when HEVC
or VP9 is decoded, otherwise the decoded picture may become corrupted.
Add a RK3328 variant with a quirk flag to disable QoS when before
decoding is started.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- Add rkvdec_quirks_disable_qos() helper to apply qos quirk
- Use quirks from rkvdec_variant
- Add num_regs field
Changes in v2:
- No change
---
.../platform/rockchip/rkvdec/rkvdec-hevc.c | 3 +++
.../platform/rockchip/rkvdec/rkvdec-regs.h | 2 ++
.../platform/rockchip/rkvdec/rkvdec-vp9.c | 4 ++++
.../media/platform/rockchip/rkvdec/rkvdec.c | 24 +++++++++++++++++++
.../media/platform/rockchip/rkvdec/rkvdec.h | 5 ++++
5 files changed, 38 insertions(+)
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
index 9b5cf70188db..fc7e6a260b0a 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
@@ -789,6 +789,9 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx)
writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND);
writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
+ if (rkvdec->variant->quirks & RKVDEC_QUIRK_DISABLE_QOS)
+ rkvdec_quirks_disable_qos(ctx);
+
/* Start decoding! */
reg = (run.pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) ?
0 : RKVDEC_WR_DDR_ALIGN_EN;
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
index 540c8bdf24e4..c627b6b6f53a 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h
@@ -219,6 +219,8 @@
#define RKVDEC_REG_H264_ERR_E 0x134
#define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff)
+#define RKVDEC_REG_QOS_CTRL 0x18C
+
#define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410
#define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
index 0e7e16f20eeb..b4bf01e839ef 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
@@ -824,6 +824,10 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN);
+
+ if (rkvdec->variant->quirks & RKVDEC_QUIRK_DISABLE_QOS)
+ rkvdec_quirks_disable_qos(ctx);
+
/* Start decoding! */
writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E |
RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E,
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
index f8cbc7bcfa15..2d7d20653e4c 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
@@ -903,6 +903,18 @@ void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run)
v4l2_ctrl_request_complete(src_req, &ctx->ctrl_hdl);
}
+void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx)
+{
+ struct rkvdec_dev *rkvdec = ctx->dev;
+ u32 reg;
+
+ /* Set undocumented swreg_block_gating_e field */
+ reg = readl(rkvdec->regs + RKVDEC_REG_QOS_CTRL);
+ reg &= GENMASK(31, 16);
+ reg |= 0xEFFF;
+ writel(reg, rkvdec->regs + RKVDEC_REG_QOS_CTRL);
+}
+
static void rkvdec_device_run(void *priv)
{
struct rkvdec_ctx *ctx = priv;
@@ -1226,6 +1238,14 @@ static const struct rkvdec_variant rk3288_rkvdec_variant = {
.capabilities = RKVDEC_CAPABILITY_HEVC,
};
+static const struct rkvdec_variant rk3328_rkvdec_variant = {
+ .num_regs = 109,
+ .capabilities = RKVDEC_CAPABILITY_HEVC |
+ RKVDEC_CAPABILITY_H264 |
+ RKVDEC_CAPABILITY_VP9,
+ .quirks = RKVDEC_QUIRK_DISABLE_QOS,
+};
+
static const struct rkvdec_variant rk3399_rkvdec_variant = {
.num_regs = 78,
.capabilities = RKVDEC_CAPABILITY_HEVC |
@@ -1238,6 +1258,10 @@ static const struct of_device_id of_rkvdec_match[] = {
.compatible = "rockchip,rk3288-vdec",
.data = &rk3288_rkvdec_variant,
},
+ {
+ .compatible = "rockchip,rk3328-vdec",
+ .data = &rk3328_rkvdec_variant,
+ },
{
.compatible = "rockchip,rk3399-vdec",
.data = &rk3399_rkvdec_variant,
diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
index c47457c954e5..566e06fa2b1e 100644
--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
@@ -26,6 +26,8 @@
#define RKVDEC_CAPABILITY_H264 BIT(1)
#define RKVDEC_CAPABILITY_VP9 BIT(2)
+#define RKVDEC_QUIRK_DISABLE_QOS BIT(0)
+
struct rkvdec_ctx;
struct rkvdec_ctrl_desc {
@@ -70,6 +72,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
struct rkvdec_variant {
unsigned int num_regs;
unsigned int capabilities;
+ unsigned int quirks;
};
struct rkvdec_coded_fmt_ops {
@@ -149,6 +152,8 @@ struct rkvdec_aux_buf {
void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
+void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx);
+
extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops;
extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops;
extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops;
--
2.51.0
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 6/7] media: dt-bindings: rockchip,vdec: Add RK3288 compatible
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (4 preceding siblings ...)
2025-09-05 16:19 ` [PATCH v3 5/7] media: rkvdec: Disable QoS for HEVC and VP9 on RK3328 Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 7/7] ARM: dts: rockchip: Add vdec node for RK3288 Jonas Karlman
` (3 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman,
Conor Dooley
Add a RK3288 compatible for a version of the Rockchip VDEC IP that only
support HEVC decoding.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes in v3:
- No change
Changes in v2:
- Collect a-b tag
---
Documentation/devicetree/bindings/media/rockchip,vdec.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
index 96b6c8938768..809fda45b3bd 100644
--- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
@@ -16,6 +16,7 @@ description: |-
properties:
compatible:
oneOf:
+ - const: rockchip,rk3288-vdec
- const: rockchip,rk3399-vdec
- const: rockchip,rk3576-vdec
- const: rockchip,rk3588-vdec
--
2.51.0
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 7/7] ARM: dts: rockchip: Add vdec node for RK3288
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (5 preceding siblings ...)
2025-09-05 16:19 ` [PATCH v3 6/7] media: dt-bindings: rockchip,vdec: Add RK3288 compatible Jonas Karlman
@ 2025-09-05 16:19 ` Jonas Karlman
2025-09-09 18:12 ` [PATCH v3 0/7] media: rkvdec: Add HEVC backend Detlev Casanova
` (2 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-05 16:19 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Jonas Karlman
From: Alex Bee <knaerzche@gmail.com>
RK3288 contains a Rockchip VDEC block that only support HEVC
decoding. Add a vdec node for this.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Changes in v3:
- No change
Changes in v2:
- No change
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 42d705b544ec..eab0c9a2d482 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1293,6 +1293,21 @@ vpu_mmu: iommu@ff9a0800 {
power-domains = <&power RK3288_PD_VIDEO>;
};
+ hevc: video-codec@ff9c0000 {
+ compatible = "rockchip,rk3288-vdec";
+ reg = <0x0 0xff9c0000 0x0 0x440>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+ clock-names = "axi", "ahb", "cabac", "core";
+ assigned-clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+ assigned-clock-rates = <400000000>, <100000000>,
+ <300000000>, <300000000>;
+ iommus = <&hevc_mmu>;
+ power-domains = <&power RK3288_PD_HEVC>;
+ };
+
hevc_mmu: iommu@ff9c0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
@@ -1300,7 +1315,7 @@ hevc_mmu: iommu@ff9c0440 {
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
- status = "disabled";
+ power-domains = <&power RK3288_PD_HEVC>;
};
gpu: gpu@ffa30000 {
--
2.51.0
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3 2/7] media: rkvdec: Add variants support
2025-09-05 16:19 ` [PATCH v3 2/7] media: rkvdec: Add variants support Jonas Karlman
@ 2025-09-08 18:32 ` Detlev Casanova
2025-09-09 8:41 ` Jonas Karlman
0 siblings, 1 reply; 13+ messages in thread
From: Detlev Casanova @ 2025-09-08 18:32 UTC (permalink / raw)
To: Jonas Karlman, Ezequiel Garcia, Mauro Carvalho Chehab,
Heiko Stuebner
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel
Hi Jonas,
On 9/5/25 12:19, Jonas Karlman wrote:
> From: Alex Bee <knaerzche@gmail.com>
>
> Different versions of the Rockchip VDEC IP exists and one way they can
> differ is what decoding formats are supported.
>
> Add a variant implementation in order to support flagging different
> capabilities.
>
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
> Changes in v3:
> - Use a reference to rkvdec_variant
> - Add num_regs field
Why are you adding this field ? I don't see it being used in a later patch.
Would that be useful for writing the right amount of registers later
when switching to structs and memcpy ?
I haven't checked how different the register maps are between those
different variants.
> - Collect r-b tag
>
> Changes in v2:
> - No change
> ---
> .../media/platform/rockchip/rkvdec/rkvdec.c | 22 ++++++++++++++++++-
> .../media/platform/rockchip/rkvdec/rkvdec.h | 11 ++++++++++
> 2 files changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> index c15fc238d6af..daf6d9ab2d1d 100644
> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
> @@ -14,6 +14,7 @@
> #include <linux/iommu.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/pm.h>
> #include <linux/pm_runtime.h>
> @@ -327,6 +328,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
> .ops = &rkvdec_hevc_fmt_ops,
> .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
> .decoded_fmts = rkvdec_hevc_decoded_fmts,
> + .capability = RKVDEC_CAPABILITY_HEVC,
> },
> {
> .fourcc = V4L2_PIX_FMT_H264_SLICE,
> @@ -343,6 +345,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
> .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
> .decoded_fmts = rkvdec_h264_decoded_fmts,
> .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
> + .capability = RKVDEC_CAPABILITY_H264,
> },
> {
> .fourcc = V4L2_PIX_FMT_VP9_FRAME,
> @@ -358,6 +361,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
> .ops = &rkvdec_vp9_fmt_ops,
> .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
> .decoded_fmts = rkvdec_vp9_decoded_fmts,
> + .capability = RKVDEC_CAPABILITY_VP9,
> }
> };
>
> @@ -1186,8 +1190,18 @@ static void rkvdec_watchdog_func(struct work_struct *work)
> }
> }
>
> +static const struct rkvdec_variant rk3399_rkvdec_variant = {
> + .num_regs = 78,
> + .capabilities = RKVDEC_CAPABILITY_HEVC |
> + RKVDEC_CAPABILITY_H264 |
> + RKVDEC_CAPABILITY_VP9,
> +};
> +
> static const struct of_device_id of_rkvdec_match[] = {
> - { .compatible = "rockchip,rk3399-vdec" },
> + {
> + .compatible = "rockchip,rk3399-vdec",
> + .data = &rk3399_rkvdec_variant,
> + },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, of_rkvdec_match);
> @@ -1198,16 +1212,22 @@ static const char * const rkvdec_clk_names[] = {
>
> static int rkvdec_probe(struct platform_device *pdev)
> {
> + const struct rkvdec_variant *variant;
> struct rkvdec_dev *rkvdec;
> unsigned int i;
> int ret, irq;
>
> + variant = of_device_get_match_data(&pdev->dev);
> + if (!variant)
> + return -EINVAL;
> +
> rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL);
> if (!rkvdec)
> return -ENOMEM;
>
> platform_set_drvdata(pdev, rkvdec);
> rkvdec->dev = &pdev->dev;
> + rkvdec->variant = variant;
> mutex_init(&rkvdec->vdev_lock);
> INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func);
>
> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> index 209dd79ce9bd..c47457c954e5 100644
> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
> @@ -22,6 +22,10 @@
> #include <media/videobuf2-core.h>
> #include <media/videobuf2-dma-contig.h>
>
> +#define RKVDEC_CAPABILITY_HEVC BIT(0)
> +#define RKVDEC_CAPABILITY_H264 BIT(1)
> +#define RKVDEC_CAPABILITY_VP9 BIT(2)
> +
> struct rkvdec_ctx;
>
> struct rkvdec_ctrl_desc {
> @@ -63,6 +67,11 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
> base.vb.vb2_buf);
> }
>
> +struct rkvdec_variant {
> + unsigned int num_regs;
> + unsigned int capabilities;
> +};
> +
> struct rkvdec_coded_fmt_ops {
> int (*adjust_fmt)(struct rkvdec_ctx *ctx,
> struct v4l2_format *f);
> @@ -98,6 +107,7 @@ struct rkvdec_coded_fmt_desc {
> unsigned int num_decoded_fmts;
> const struct rkvdec_decoded_fmt_desc *decoded_fmts;
> u32 subsystem_flags;
> + unsigned int capability;
> };
>
> struct rkvdec_dev {
> @@ -111,6 +121,7 @@ struct rkvdec_dev {
> struct mutex vdev_lock; /* serializes ioctls */
> struct delayed_work watchdog_work;
> struct iommu_domain *empty_domain;
> + const struct rkvdec_variant *variant;
> };
>
> struct rkvdec_ctx {
Regards,
Detlev
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 2/7] media: rkvdec: Add variants support
2025-09-08 18:32 ` Detlev Casanova
@ 2025-09-09 8:41 ` Jonas Karlman
0 siblings, 0 replies; 13+ messages in thread
From: Jonas Karlman @ 2025-09-09 8:41 UTC (permalink / raw)
To: Detlev Casanova
Cc: Ezequiel Garcia, Mauro Carvalho Chehab, Heiko Stuebner, Alex Bee,
Nicolas Dufresne, linux-media, linux-rockchip, devicetree,
linux-arm-kernel, linux-kernel
Hi Detlev,
On 9/8/2025 8:32 PM, Detlev Casanova wrote:
> Hi Jonas,
>
> On 9/5/25 12:19, Jonas Karlman wrote:
>> From: Alex Bee <knaerzche@gmail.com>
>>
>> Different versions of the Rockchip VDEC IP exists and one way they can
>> differ is what decoding formats are supported.
>>
>> Add a variant implementation in order to support flagging different
>> capabilities.
>>
>> Signed-off-by: Alex Bee <knaerzche@gmail.com>
>> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>> Changes in v3:
>> - Use a reference to rkvdec_variant
>> - Add num_regs field
>
> Why are you adding this field ? I don't see it being used in a later patch.
Correct, this was briefly mentioned in the cover letter change log for v3:
Add num_regs field to rkvdec_variant, currently not used for anything
This addition was mostly to make us aware that there are different
number of swregs for the different variants of "rkvdev1".
>
> Would that be useful for writing the right amount of registers later
> when switching to structs and memcpy ?
Correct, to my knowledge there are 3 different register configurations
for "rkvdec1", all are mostly extended with more registers at the end.
68 (rk3288) -> 78 (rk3399) -> 109 (rk3328)
Currently there are writel() that are blindly written to regs >68 and
>78 regardless of variant. If we are to move to use io memcpy we should
probably ensure to write to the regs that exists for each variant.
>
> I haven't checked how different the register maps are between those
> different variants.
As mentioned above they mostly differ at the end (more swregs), or use
additional previously unused bits of existing swregs. E.g. rk3328 has
sw_wr_ddr_align_en, sw_scl_down_en and sw_allow_not_wr_unref_bframe
added to swreg1.
The added num_regs can be dropped or replaced with proper structs (or
something different) if you think that is a better way to signal how the
variants regs differs.
Regards,
Jonas
>
>> - Collect r-b tag
>>
>> Changes in v2:
>> - No change
>> ---
>> .../media/platform/rockchip/rkvdec/rkvdec.c | 22 ++++++++++++++++++-
>> .../media/platform/rockchip/rkvdec/rkvdec.h | 11 ++++++++++
>> 2 files changed, 32 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
>> index c15fc238d6af..daf6d9ab2d1d 100644
>> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c
>> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c
>> @@ -14,6 +14,7 @@
>> #include <linux/iommu.h>
>> #include <linux/module.h>
>> #include <linux/of.h>
>> +#include <linux/of_device.h>
>> #include <linux/platform_device.h>
>> #include <linux/pm.h>
>> #include <linux/pm_runtime.h>
>> @@ -327,6 +328,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
>> .ops = &rkvdec_hevc_fmt_ops,
>> .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
>> .decoded_fmts = rkvdec_hevc_decoded_fmts,
>> + .capability = RKVDEC_CAPABILITY_HEVC,
>> },
>> {
>> .fourcc = V4L2_PIX_FMT_H264_SLICE,
>> @@ -343,6 +345,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
>> .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
>> .decoded_fmts = rkvdec_h264_decoded_fmts,
>> .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF,
>> + .capability = RKVDEC_CAPABILITY_H264,
>> },
>> {
>> .fourcc = V4L2_PIX_FMT_VP9_FRAME,
>> @@ -358,6 +361,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
>> .ops = &rkvdec_vp9_fmt_ops,
>> .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
>> .decoded_fmts = rkvdec_vp9_decoded_fmts,
>> + .capability = RKVDEC_CAPABILITY_VP9,
>> }
>> };
>>
>> @@ -1186,8 +1190,18 @@ static void rkvdec_watchdog_func(struct work_struct *work)
>> }
>> }
>>
>> +static const struct rkvdec_variant rk3399_rkvdec_variant = {
>> + .num_regs = 78,
>> + .capabilities = RKVDEC_CAPABILITY_HEVC |
>> + RKVDEC_CAPABILITY_H264 |
>> + RKVDEC_CAPABILITY_VP9,
>> +};
>> +
>> static const struct of_device_id of_rkvdec_match[] = {
>> - { .compatible = "rockchip,rk3399-vdec" },
>> + {
>> + .compatible = "rockchip,rk3399-vdec",
>> + .data = &rk3399_rkvdec_variant,
>> + },
>> { /* sentinel */ }
>> };
>> MODULE_DEVICE_TABLE(of, of_rkvdec_match);
>> @@ -1198,16 +1212,22 @@ static const char * const rkvdec_clk_names[] = {
>>
>> static int rkvdec_probe(struct platform_device *pdev)
>> {
>> + const struct rkvdec_variant *variant;
>> struct rkvdec_dev *rkvdec;
>> unsigned int i;
>> int ret, irq;
>>
>> + variant = of_device_get_match_data(&pdev->dev);
>> + if (!variant)
>> + return -EINVAL;
>> +
>> rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL);
>> if (!rkvdec)
>> return -ENOMEM;
>>
>> platform_set_drvdata(pdev, rkvdec);
>> rkvdec->dev = &pdev->dev;
>> + rkvdec->variant = variant;
>> mutex_init(&rkvdec->vdev_lock);
>> INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func);
>>
>> diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
>> index 209dd79ce9bd..c47457c954e5 100644
>> --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h
>> +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h
>> @@ -22,6 +22,10 @@
>> #include <media/videobuf2-core.h>
>> #include <media/videobuf2-dma-contig.h>
>>
>> +#define RKVDEC_CAPABILITY_HEVC BIT(0)
>> +#define RKVDEC_CAPABILITY_H264 BIT(1)
>> +#define RKVDEC_CAPABILITY_VP9 BIT(2)
>> +
>> struct rkvdec_ctx;
>>
>> struct rkvdec_ctrl_desc {
>> @@ -63,6 +67,11 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
>> base.vb.vb2_buf);
>> }
>>
>> +struct rkvdec_variant {
>> + unsigned int num_regs;
>> + unsigned int capabilities;
>> +};
>> +
>> struct rkvdec_coded_fmt_ops {
>> int (*adjust_fmt)(struct rkvdec_ctx *ctx,
>> struct v4l2_format *f);
>> @@ -98,6 +107,7 @@ struct rkvdec_coded_fmt_desc {
>> unsigned int num_decoded_fmts;
>> const struct rkvdec_decoded_fmt_desc *decoded_fmts;
>> u32 subsystem_flags;
>> + unsigned int capability;
>> };
>>
>> struct rkvdec_dev {
>> @@ -111,6 +121,7 @@ struct rkvdec_dev {
>> struct mutex vdev_lock; /* serializes ioctls */
>> struct delayed_work watchdog_work;
>> struct iommu_domain *empty_domain;
>> + const struct rkvdec_variant *variant;
>> };
>>
>> struct rkvdec_ctx {
>
> Regards,
>
> Detlev
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 0/7] media: rkvdec: Add HEVC backend
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (6 preceding siblings ...)
2025-09-05 16:19 ` [PATCH v3 7/7] ARM: dts: rockchip: Add vdec node for RK3288 Jonas Karlman
@ 2025-09-09 18:12 ` Detlev Casanova
2025-09-13 14:51 ` Diederik de Haas
2025-12-15 11:47 ` (subset) " Heiko Stuebner
9 siblings, 0 replies; 13+ messages in thread
From: Detlev Casanova @ 2025-09-09 18:12 UTC (permalink / raw)
To: Jonas Karlman, Ezequiel Garcia, Mauro Carvalho Chehab
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel
Hi Jonas,
On 9/5/25 12:19, Jonas Karlman wrote:
> This series add a HEVC backend to the Rockchip Video Decoder driver.
>
> With the dependent H.264 High 10 and 4:2:2 profile support series
> finally merged there is finally time to send a v2 with minor changes and
> a suggested code style fix of this series. v1 of this series has been
> fully functional up until recent unstaging of the rkvdec driver.
>
> A version of this HEVC backend has been in use by the LibreELEC distro
> for the past 5+ years [1]. It was initially created based on a copy of
> the H264 backend, unstable HEVC uAPI controls and a cabac table + scaling
> matrix functions shamelessly copied 1:1 from the Rockchip mpp library.
>
> It has since then been extended to use the stable HEVC uAPI controls and
> improved opon e.g. to include support for rk3288 and fix decoding issues
> by Alex Bee and Nicolas Dufresne.
>
> The version submitted in this series is based on the code currently used
> by the LibreELEC distro, excluding hard/soft reset, and with cabac table
> and scaling matrix functions picked from Sebastian Fricke prior series
> to add a HEVC backend [2].
>
> Big thanks to Alex Bee, Nicolas Dufresne and Sebastian Fricke for making
> this series possible!
>
> Patch 1 add the new HEVC backend.
> Patch 2-3 add variants support to the driver.
> Patch 4 add support for a rk3288 variant.
> Patch 5 add a rk3328 variant to work around hw quirks.
> Patch 6-7 add device tree node for rk3288.
>
> This was tested on a ROCK Pi 4 (RK3399) and Rock64 (RK3328):
>
> v4l2-compliance 1.30.1, 64 bits, 64-bit time_t
> ...
> Total for rkvdec device /dev/video1: 49, Succeeded: 49, Failed: 0, Warnings: 0
>
> Running test suite JCT-VC-HEVC_V1 with decoder FFmpeg-H.265-v4l2request
> ...
> Ran 137/147 tests successfully
>
> Running test suite JCT-VC-MV-HEVC with decoder FFmpeg-H.265-v4l2request
> ...
> Ran 9/9 tests successfully
>
> And on a TinkerBoard (RK3288):
>
> v4l2-compliance 1.30.1, 32 bits, 32-bit time_t
> ...
> Total for rkvdec device /dev/video3: 49, Succeeded: 49, Failed: 0, Warnings: 0
>
> Running test suite JCT-VC-HEVC_V1 with decoder FFmpeg-H.265-v4l2request
> ...
> Ran 137/147 tests successfully
>
> Running test suite JCT-VC-MV-HEVC with decoder FFmpeg-H.265-v4l2request
> ...
> Ran 9/9 tests successfully
>
> The WPP_x_ericsson tests from test suite JCT-VC-HEVC_V1 has been showing
> a mix of both Success and/or Fail result for FFmpeg-H.265-v4l2request.
>
> Full summary of fluster run can be found at [3].
>
> Please note that there is a known issue with concurrent decoding,
> decoding errors in one decode session may affect a separate session.
> The only known mitigation to this is to pause decoding for some time
> and/or do a full HW reset, something to handle in future series.
I also tested on Rock Pi 4 SE (but with Gstreamer instead of FFmpeg) and
can
confirm the same results, so, for the whole series:
Tested-by: Detlev Casanova <detlev.casanova@collabora.com> # RK3399
Best regards,
Detlev
> Changes in v3:
> - Change to use file_to_rkvdec_ctx()
> - Rename assemble_hw_rps to assemble_sw_rps
> - Use a reference to rkvdec_variant instead of copying capabilities and
> quirks to rkvdec_dev
> - Add num_regs field to rkvdec_variant, currently not used for anything
> - Add and use rkvdec_quirks_disable_qos() helper to apply qos quirk
> - Collect t-b and r-b tags
> Link to v2: https://lore.kernel.org/linux-media/20250810212454.3237486-1-jonas@kwiboo.se
>
> Changes in v2:
> - Rabase after h264 high10/422 merge and unstaging of rkvdec driver
> - Use new_value in transpose_and_flatten_matrices()
> - Add NULL check for ctrl->new_elems in rkvdec_hevc_run_preamble()
> - Set RKVDEC_WR_DDR_ALIGN_EN for RK3328
> - Adjust code style in rkvdec_enum_coded_fmt_desc()
> - Collect a-b tag
> - Drop merged vdec node reg size patches
> Link to v1: https://lore.kernel.org/linux-media/20231105233630.3927502-1-jonas@kwiboo.se
>
> [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/projects/Rockchip/patches/linux/default/linux-2000-v4l2-wip-rkvdec-hevc.patch
> [2] https://lore.kernel.org/linux-media/20230101-patch-series-v2-6-2-rc1-v2-0-fa1897efac14@collabora.com/
> [3] https://gist.github.com/Kwiboo/0ea22df1c9c3f3a48479d3f7ec28169d
>
> Alex Bee (4):
> media: rkvdec: Add variants support
> media: rkvdec: Add RK3288 variant
> media: rkvdec: Disable QoS for HEVC and VP9 on RK3328
> ARM: dts: rockchip: Add vdec node for RK3288
>
> Jonas Karlman (3):
> media: rkvdec: Add HEVC backend
> media: rkvdec: Implement capability filtering
> media: dt-bindings: rockchip,vdec: Add RK3288 compatible
>
> .../bindings/media/rockchip,vdec.yaml | 1 +
> arch/arm/boot/dts/rockchip/rk3288.dtsi | 17 +-
> .../media/platform/rockchip/rkvdec/Makefile | 2 +-
> .../rockchip/rkvdec/rkvdec-hevc-data.c | 1848 +++++++++++++++++
> .../platform/rockchip/rkvdec/rkvdec-hevc.c | 820 ++++++++
> .../platform/rockchip/rkvdec/rkvdec-regs.h | 4 +
> .../platform/rockchip/rkvdec/rkvdec-vp9.c | 4 +
> .../media/platform/rockchip/rkvdec/rkvdec.c | 198 +-
> .../media/platform/rockchip/rkvdec/rkvdec.h | 17 +
> 9 files changed, 2890 insertions(+), 21 deletions(-)
> create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c
> create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 0/7] media: rkvdec: Add HEVC backend
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (7 preceding siblings ...)
2025-09-09 18:12 ` [PATCH v3 0/7] media: rkvdec: Add HEVC backend Detlev Casanova
@ 2025-09-13 14:51 ` Diederik de Haas
2025-12-15 11:47 ` (subset) " Heiko Stuebner
9 siblings, 0 replies; 13+ messages in thread
From: Diederik de Haas @ 2025-09-13 14:51 UTC (permalink / raw)
To: Jonas Karlman, Ezequiel Garcia, Detlev Casanova,
Mauro Carvalho Chehab
Cc: Alex Bee, Nicolas Dufresne, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, linux-kernel, Christian Hewitt
[-- Attachment #1.1: Type: text/plain, Size: 4677 bytes --]
On Fri Sep 5, 2025 at 6:19 PM CEST, Jonas Karlman wrote:
> This series add a HEVC backend to the Rockchip Video Decoder driver.
I did some testing and the TL;DR version is:
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64, RockPro64, Quartz64-B, NanoPi R5S
Now for the long version ;-P
I built a 5.17-rc5 kernel with this patch set [1], which was based upon
linuxtv's next branch, so I just took all their commits on 2025-09-07.
Then rebased Detlev's rkvdec patch set on top of that.
As I have quite a few rk356x based devices and there wasn't a DT patch
to enable rkvdec2, I 'assembled' my own one. (And some more patches)
I have a patched ffmpeg [2] and with its -dev libraries built a patched
mpv [3]. Installed that onto (mostly) Debian Forky systems with mesa
25.2.2 and sway 1.11. I have a number of test files which are provided
via NFS so storage device wouldn't matter and it's also what I use with
LibreELEC (both 12.2 as 12.90.1 provided by 'chewitt').
And then I went on to perform the same tests on these devices:
1) Pine64 Rock64 (rk3328)
2) Pine64 RockPro64 (rk3399)
3) Pine64 Quartz64 Model B (rk3566) *
4) FriendlyELEC NanoPi R5S (rk3568) *
*) I blacklisted the hantro driver
My testing showed that the 'classical' Big Buck Bunny video worked the
best for testing ... meaning it caused the most 'problems'.
I used the 'Standard 2D' 'Full HD (1920x1080)' '60 fps' version which
you can download from [4]. That'll give you an 8-bit encoded x264
version of that video. I have converted that video to x265 with a script
I wrote (quite) a while ago [5]; instructions near the end of that
script (no hdr no resize 'branch' about $TENBIT_PARAMS).
That resulted in 2 test files:
a) bbb_sunflower_1080p_60fps_normal.x265.cf24.slow.8bit.mp4
b) bbb_sunflower_1080p_60fps_normal.x265.cf24.medium.10bit.mp4
Testing went as follows:
I logged into the device, started sway and opened a 'foot' terminal and
navigated to my NFS share with the test files. Then I used
mpv --hwdec=v4l2request <video-file> [--fullscreen=yes]
Without the 'fullscreen' param it shows the video in the right part of
the screen (1080p monitor), while the left part shows mpv's output.
This made it easy to see 'dropped frames' and any audio delay.
I played each file twice, one using half the screen and one fullscreen.
This had less of an effect then I expected; only in a few cases it
'pushed it over the edge' and the only real effect was with Rock64 ...
which being the least powerful is (kinda) expected.
The results of the 10-bit x265 files was uniform: only a blue screen was
visible and OSD (with 'I' or 'O' in mpv) didn't work. Interestingly it
also had no frame drops ... except when doing 'I' (with no visible
effect), then it dropped a couple of frames (one time quite a few).
Mpv showed this error message each time:
[vo/gpu] Initializing texture for hardware decoding failed
For the 8-bit x265 file, the results were more varied:
- On Rock64 HW accel worked, but the videos had a red 'glare' over them.
None of the other devices had that, so maybe related to 'lima'?
On LE it did NOT have the red glare. It did seem to have quite a bit
of trouble starting it
- On Rock64 it dropped 970 frames in 60 secs and 2480 in fullscreen.
This resulted in quite a shockery display and noticeable artifacts.
That was not (or at least a whole lot less) the case with LE.
- On the other devices there was not much difference in dropped frames
when it came to windowed vs full-screen, but the frame drops were
quite high ~2000 when HW accelerated and up to ~3000 when not
I got the impression that ~3Mbps bitrate was a tipping point.
- The original BBB file (thus x264) had a similar high frame drop rate,
so the problem seems unrelated to this patch set
- Audio delay was sometimes huge (>60 secs after 60 secs :-O), and HW
acceleration fixed that (due to free 'CPU' capacity?)
The 'scores' for my other test files were actually quite good \o/
All my video were HW accelerated; 8-bit with nv12 worked good while
10-bit with nv15 was very blue. But all were corrected detected.
So IMO this is a massive improvement! Thanks a LOT :-D
Cheers,
Diederik
[1] https://salsa.debian.org/diederik/linux/-/tree/cknow/media-next
(Salsa CI fails as it can't deal with the ~ in 6.17~rc5)
[2] https://salsa.debian.org/diederik/ffmpeg/-/tree/v4l2request-2025-v3-rkvdec-n7.1
[3] https://salsa.debian.org/diederik/mpv/-/tree/v4l2request-support
[4] http://bbb3d.renderfarming.net/download.html
[5] https://paste.sr.ht/~diederik/52b81ebc4c14b5146eb9b687bb1e8c1d62787991
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: (subset) [PATCH v3 0/7] media: rkvdec: Add HEVC backend
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
` (8 preceding siblings ...)
2025-09-13 14:51 ` Diederik de Haas
@ 2025-12-15 11:47 ` Heiko Stuebner
9 siblings, 0 replies; 13+ messages in thread
From: Heiko Stuebner @ 2025-12-15 11:47 UTC (permalink / raw)
To: Ezequiel Garcia, Detlev Casanova, Mauro Carvalho Chehab,
Jonas Karlman
Cc: Heiko Stuebner, Alex Bee, Nicolas Dufresne, linux-media,
linux-rockchip, devicetree, linux-arm-kernel, linux-kernel
On Fri, 05 Sep 2025 16:19:18 +0000, Jonas Karlman wrote:
> This series add a HEVC backend to the Rockchip Video Decoder driver.
>
> With the dependent H.264 High 10 and 4:2:2 profile support series
> finally merged there is finally time to send a v2 with minor changes and
> a suggested code style fix of this series. v1 of this series has been
> fully functional up until recent unstaging of the rkvdec driver.
>
> [...]
Applied, thanks!
[7/7] ARM: dts: rockchip: Add vdec node for RK3288
commit: e74470cf3101da79666f20186c9406192223e9a8
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2025-12-15 11:47 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-05 16:19 [PATCH v3 0/7] media: rkvdec: Add HEVC backend Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 1/7] " Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 2/7] media: rkvdec: Add variants support Jonas Karlman
2025-09-08 18:32 ` Detlev Casanova
2025-09-09 8:41 ` Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 3/7] media: rkvdec: Implement capability filtering Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 4/7] media: rkvdec: Add RK3288 variant Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 5/7] media: rkvdec: Disable QoS for HEVC and VP9 on RK3328 Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 6/7] media: dt-bindings: rockchip,vdec: Add RK3288 compatible Jonas Karlman
2025-09-05 16:19 ` [PATCH v3 7/7] ARM: dts: rockchip: Add vdec node for RK3288 Jonas Karlman
2025-09-09 18:12 ` [PATCH v3 0/7] media: rkvdec: Add HEVC backend Detlev Casanova
2025-09-13 14:51 ` Diederik de Haas
2025-12-15 11:47 ` (subset) " Heiko Stuebner
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