From: Hans Zhang <hans.zhang@cixtech.com>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
linux-rockchip@lists.infradead.org,
Niklas Cassel <cassel@kernel.org>,
linux-pci@vger.kernel.org, Heiko Stuebner <heiko@sntech.de>,
Manivannan Sadhasivam <mani@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 3/4] PCI: dw-rockchip: Add L1sub support
Date: Tue, 21 Oct 2025 17:03:00 +0800 [thread overview]
Message-ID: <ea1f6a6d-14d5-4655-9eed-110c02c8f487@cixtech.com> (raw)
In-Reply-To: <162e1af2-7de3-4aed-93d1-fa7120254e69@rock-chips.com>
On 10/21/2025 4:42 PM, Shawn Lin wrote:
>>>
>>> -/*
>>> - * See e.g. section '11.6.6.4 L1 Substate' in the RK3588 TRM V1.0 for
>>> the steps
>>> - * needed to support L1 substates. Currently, not a single rockchip
>>> platform
>>> - * performs these steps, so disable L1 substates until there is
>>> proper support.
>>> - */
>>> -static void rockchip_pcie_disable_l1sub(struct dw_pcie *pci)
>>
>> Hi,
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?
>> h=controller/dw-rockchip&id=40331c63e7901a2cc75ce6b5d24d50601efb833d
>>
>> Mani has already placed this part in the above branch. Can it be removed?
>>
>
> I think it's better to apply the changes on top of Niklas's commit
> rather than removing it, out of respect for Niklas's credit.
Hi Shawn,
Sorry, maybe I'm just looking at this issue from the perspective of
patch and understand what you mean.
Best regards,
Hans
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-10-21 9:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-21 7:48 [PATCH 0/4] Add L1 substates support for Rockchip platforms Shawn Lin
2025-10-21 7:48 ` [PATCH 1/4] PCI: of: Add of_pci_clkreq_present() Shawn Lin
2025-10-21 16:16 ` Frank Li
2025-10-22 9:17 ` Shawn Lin
2025-10-22 10:02 ` Manivannan Sadhasivam
2025-10-22 10:13 ` Shawn Lin
2025-10-22 10:29 ` Manivannan Sadhasivam
2025-10-22 16:22 ` Bjorn Helgaas
2025-10-22 17:35 ` Manivannan Sadhasivam
2025-10-22 18:14 ` Bjorn Helgaas
2025-10-21 7:48 ` [PATCH 2/4] PCI: tegra194: Use of_pci_clkreq_present() instead Shawn Lin
2025-10-21 7:48 ` [PATCH 3/4] PCI: dw-rockchip: Add L1sub support Shawn Lin
2025-10-21 8:01 ` Hans Zhang
2025-10-21 8:42 ` Shawn Lin
2025-10-21 9:03 ` Hans Zhang [this message]
2025-10-22 10:34 ` Manivannan Sadhasivam
2025-10-21 7:48 ` [PATCH 4/4] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1 Shawn Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ea1f6a6d-14d5-4655-9eed-110c02c8f487@cixtech.com \
--to=hans.zhang@cixtech.com \
--cc=bhelgaas@google.com \
--cc=cassel@kernel.org \
--cc=heiko@sntech.de \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=mani@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox