[PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema

[PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema

[Udaya Kiran Challa]

Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
controller binding from the legacy text format to DT schema.

Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v1:
- Add default value for divisor-mask
- Add required properties compatible and model
- Fix example node name
- Update example size cells and reg value

Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
---
 .../bindings/clock/via,vt8500-clock.yaml      | 126 ++++++++++++++++++
 .../devicetree/bindings/clock/vt8500.txt      |  74 ----------
 2 files changed, 126 insertions(+), 74 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt

diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
new file mode 100644
index 000000000000..9e19103866bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
@@ -0,0 +1,126 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Clock Controller
+
+maintainers:
+  - Michael Turquette <mturquette@baylibre.com>
+  - Stephen Boyd <sboyd@kernel.org>
+
+description: |
+  Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
+  series SoCs.
+
+properties:
+  compatible:
+    enum:
+      - via,vt8500-pll-clock
+      - wm,wm8650-pll-clock
+      - wm,wm8750-pll-clock
+      - wm,wm8850-pll-clock
+      - via,vt8500-device-clock
+
+  reg:
+    maxItems: 1
+    description:
+      Offset of the PLL register within the PMC register space.
+
+  clocks:
+    maxItems: 1
+    description:
+      Parent reference clock.
+
+  "#clock-cells":
+    const: 0
+
+  enable-reg:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Offset of the clock enable register within the PMC register space.
+
+  enable-bit:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    maximum: 31
+    description:
+      Bit index controlling clock enable.
+
+  divisor-reg:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Offset of the clock divisor register within the PMC register space.
+
+  divisor-mask:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    default: 0x1f
+    description:
+      Bitmask describing the divisor field inside divisor-reg.
+
+required:
+  - compatible
+  - "#clock-cells"
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          enum:
+            - via,vt8500-pll-clock
+            - wm,wm8650-pll-clock
+            - wm,wm8750-pll-clock
+            - wm,wm8850-pll-clock
+    then:
+      required:
+        - reg
+        - clocks
+
+  - if:
+      properties:
+        compatible:
+          const: via,vt8500-device-clock
+    then:
+      required:
+        - clocks
+      anyOf:
+        - required:
+            - enable-reg
+            - enable-bit
+        - required:
+            - divisor-reg
+
+additionalProperties: false
+
+examples:
+  - |
+    / {
+        compatible = "via,wm8650";
+        model = "Wondermedia WM8650";
+
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        ref25: clock-25000000 {
+            compatible = "fixed-clock";
+            #clock-cells = <0>;
+            clock-frequency = <25000000>;
+        };
+
+        plla: clock@200 {
+            compatible = "wm,wm8650-pll-clock";
+            reg = <0x200 0x04>;
+            clocks = <&ref25>;
+            #clock-cells = <0>;
+        };
+
+        clksdhc: clock {
+            compatible = "via,vt8500-device-clock";
+            clocks = <&plla>;
+            divisor-reg = <0x328>;
+            divisor-mask = <0x3f>;
+            enable-reg = <0x254>;
+            enable-bit = <18>;
+            #clock-cells = <0>;
+        };
+    };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
deleted file mode 100644
index 91d71cc0314a..000000000000
--- a/Documentation/devicetree/bindings/clock/vt8500.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Device Tree Clock bindings for arch-vt8500
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
-	"via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
-	"wm,wm8650-pll-clock" - for a WM8650 PLL clock
-	"wm,wm8750-pll-clock" - for a WM8750 PLL clock
-	"wm,wm8850-pll-clock" - for a WM8850 PLL clock
-	"via,vt8500-device-clock" - for a VT/WM device clock
-
-Required properties for PLL clocks:
-- reg : shall be the control register offset from PMC base for the pll clock.
-- clocks : shall be the input parent clock phandle for the clock. This should
-	be the reference clock.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-Required properties for device clocks:
-- clocks : shall be the input parent clock phandle for the clock. This should
-	be a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-
-Device Clocks
-
-Device clocks are required to have one or both of the following sets of
-properties:
-
-
-Gated device clocks:
-
-Required properties:
-- enable-reg : shall be the register offset from PMC base for the enable
-	register.
-- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
-
-
-Divisor device clocks:
-
-Required property:
-- divisor-reg : shall be the register offset from PMC base for the divisor
-	register.
-Optional property:
-- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
-	if not specified.
-
-
-For example:
-
-ref25: ref25M {
-	#clock-cells = <0>;
-	compatible = "fixed-clock";
-	clock-frequency = <25000000>;
-};
-
-plla: plla {
-	#clock-cells = <0>;
-	compatible = "wm,wm8650-pll-clock";
-	clocks = <&ref25>;
-	reg = <0x200>;
-};
-
-sdhc: sdhc {
-	#clock-cells = <0>;
-	compatible = "via,vt8500-device-clock";
-	clocks = <&pllb>;
-	divisor-reg = <0x328>;
-	divisor-mask = <0x3f>;
-	enable-reg = <0x254>;
-	enable-bit = <18>;
-};
-- 
2.43.0

Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema

[Rob Herring (Arm)]

On Thu, 21 May 2026 22:37:28 +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
> 
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> Changelog:
> Changes since v1:
> - Add default value for divisor-mask
> - Add required properties compatible and model
> - Fix example node name
> - Update example size cells and reg value
> 
> Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
> ---
>  .../bindings/clock/via,vt8500-clock.yaml      | 126 ++++++++++++++++++
>  .../devicetree/bindings/clock/vt8500.txt      |  74 ----------
>  2 files changed, 126 insertions(+), 74 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
>  delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: failed to match any schema with compatible: ['via,wm8650']

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20260521170810.19702-1-challauday369@gmail.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema

[Krzysztof Kozlowski]

On Thu, May 21, 2026 at 10:37:28PM +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
> 
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> Changelog:
> Changes since v1:
> - Add default value for divisor-mask
> - Add required properties compatible and model
> - Fix example node name
> - Update example size cells and reg value
> 
> Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
> ---
>  .../bindings/clock/via,vt8500-clock.yaml      | 126 ++++++++++++++++++
>  .../devicetree/bindings/clock/vt8500.txt      |  74 ----------
>  2 files changed, 126 insertions(+), 74 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
>  delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
> 
> diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> new file mode 100644
> index 000000000000..9e19103866bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> @@ -0,0 +1,126 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: VIA/Wondermedia VT8500 Clock Controller
> +
> +maintainers:
> +  - Michael Turquette <mturquette@baylibre.com>
> +  - Stephen Boyd <sboyd@kernel.org>
> +
> +description: |

Do not need '|' unless you need to preserve formatting.

> +  Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
> +  series SoCs.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - via,vt8500-pll-clock
> +      - wm,wm8650-pll-clock
> +      - wm,wm8750-pll-clock
> +      - wm,wm8850-pll-clock
> +      - via,vt8500-device-clock
> +
> +  reg:
> +    maxItems: 1
> +    description:
> +      Offset of the PLL register within the PMC register space.
> +
> +  clocks:
> +    maxItems: 1
> +    description:
> +      Parent reference clock.

Drop description

> +
> +  "#clock-cells":
> +    const: 0
> +
> +  enable-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Offset of the clock enable register within the PMC register space.
> +
> +  enable-bit:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    maximum: 31
> +    description:
> +      Bit index controlling clock enable.
> +
> +  divisor-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Offset of the clock divisor register within the PMC register space.
> +
> +  divisor-mask:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    default: 0x1f
> +    description:
> +      Bitmask describing the divisor field inside divisor-reg.
> +
> +required:
> +  - compatible
> +  - "#clock-cells"
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - via,vt8500-pll-clock
> +            - wm,wm8650-pll-clock
> +            - wm,wm8750-pll-clock
> +            - wm,wm8850-pll-clock
> +    then:
> +      required:
> +        - reg
> +        - clocks
> +
> +  - if:
> +      properties:
> +        compatible:
> +          const: via,vt8500-device-clock
> +    then:
> +      required:
> +        - clocks
> +      anyOf:
> +        - required:
> +            - enable-reg
> +            - enable-bit
> +        - required:
> +            - divisor-reg

reg: false, no?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    / {
> +        compatible = "via,wm8650";
> +        model = "Wondermedia WM8650";
> +
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        ref25: clock-25000000 {
> +            compatible = "fixed-clock";
> +            #clock-cells = <0>;
> +            clock-frequency = <25000000>;
> +        };

Drop everything above

> +
> +        plla: clock@200 {
> +            compatible = "wm,wm8650-pll-clock";
> +            reg = <0x200 0x04>;
> +            clocks = <&ref25>;
> +            #clock-cells = <0>;
> +        };
> +
> +        clksdhc: clock {

Entire binding is for part of other device, so where is the rest? This
should not be done separately from the parent. And then example goes
only to one place.

Best regards,
Krzysztof

Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema

[Uday Kiran]

On Fri, May 22, 2026 at 12:12 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > +
> > +        plla: clock@200 {
> > +            compatible = "wm,wm8650-pll-clock";
> > +            reg = <0x200 0x04>;
> > +            clocks = <&ref25>;
> > +            #clock-cells = <0>;
> > +        };
> > +
> > +        clksdhc: clock {
>
> Entire binding is for part of other device, so where is the rest? This
> should not be done separately from the parent. And then example goes
> only to one place.

Thanks for the review Krzysztof.

And sorry, I initially converted the legacy clock/vt8500.txt binding directly to
YAML and missed that the clock nodes are actually child nodes of the PMC
device, which already has a separate binding documented in:

Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt

I'll rework this by splitting the conversion into two schemas:

via,vt8500-pmc.yaml for the PMC device itself
via,vt8500-clock.yaml for the clocks child node and the PLL/device clock child
bindings

The clock binding example will retain the PMC hierarchy context, but the PMC
properties themselves will be described in the PMC schema instead of
duplicating them in the clock binding.

Regards,
Udaya Kiran Challa