[RFC PATCH 0/4] rtc: rzn1: support XTAL clk and SCMP method

[RFC PATCH 0/4] rtc: rzn1: support XTAL clk and SCMP method

[Wolfram Sang]

So far, the code and the binding for the RZ/N1D RTC assumed an input
clock of 32768Hz, so it was not explicitly described. It makes sense to
do this, though. For one reason, clocks with other frequencies might be
used which this RTC supports via the SCMP counting method. Also, the
upcoming R-Car Gen5 have only the SCMP method described, so we need to
use it there.

This series is for collecting comments about the approach. I am aware
that the DTS changes no to go in separately from the code changes. And
the last patch will be updated and resent once I have tested these
patches on hardware. That might take a while but I'd like the
preparational patches to go in earlier. They are benefitial for N1D,
after all.

The series has been tested on a Renesas RZ/N1D board with hacked
devicetree values.

Looking forward to comments.


Wolfram Sang (4):
  dt-bindings: rtc: rzn1: add optional second clock
  ARM: dts: renesas: r9a06g032: add second clock input to RTC
  rtc: rzn1: support input frequencies other than 32768Hz
  WIP rtc: rzn1: add driver support for R-Car Gen5

 .../bindings/rtc/renesas,rzn1-rtc.yaml        |  8 ++-
 .../dts/renesas/r9a06g032-rzn1d400-db.dts     |  4 ++
 arch/arm/boot/dts/renesas/r9a06g032.dtsi      |  4 +-
 drivers/rtc/rtc-rzn1.c                        | 67 ++++++++++++++++---
 4 files changed, 70 insertions(+), 13 deletions(-)

-- 
2.47.2

[RFC PATCH 1/4] dt-bindings: rtc: rzn1: add optional second clock

[Wolfram Sang]

The external crystal can be a second clock input. It is needed for the
SCMP counting method which allows using crystals different than 32768Hz.
It is also needed for an upcoming SoC which only supports the SCMP
method.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 .../devicetree/bindings/rtc/renesas,rzn1-rtc.yaml         | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
index f6e0c613af67..f6fdcc7090b6 100644
--- a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
@@ -33,10 +33,14 @@ properties:
       - const: pps
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
 
   clock-names:
-    const: hclk
+    minItems: 1
+    items:
+      - const: hclk
+      - const: xtal
 
   power-domains:
     maxItems: 1
-- 
2.47.2

Re: [RFC PATCH 1/4] dt-bindings: rtc: rzn1: add optional second clock

[Krzysztof Kozlowski]

On Thu, Mar 13, 2025 at 11:25:42AM +0100, Wolfram Sang wrote:
> The external crystal can be a second clock input. It is needed for the
> SCMP counting method which allows using crystals different than 32768Hz.
> It is also needed for an upcoming SoC which only supports the SCMP
> method.
>

Probably the binding was incomplete and you always had external crystal
connected. I assume you want to keep old DTS, so it is fine for me:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [RFC PATCH 1/4] dt-bindings: rtc: rzn1: add optional second clock

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 436 bytes --]


> Probably the binding was incomplete and you always had external crystal
> connected. I assume you want to keep old DTS, so it is fine for me:

The documentation explicitly mentions how to wire clock lines if you are
not using the RTC and have no oscillator. But yeah, then the RTC DT node
should be disabled.

And yes, I want to be backwards compatible.

> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Thanks!


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[RFC PATCH 3/4] rtc: rzn1: support input frequencies other than 32768Hz

[Wolfram Sang]

When using the SCMP mode instead of SUBU, this RTC can also support
other input frequencies than 32768Hz. Also, upcoming SoCs will only
support SCMP.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/rtc/rtc-rzn1.c | 43 ++++++++++++++++++++++++++++++++----------
 1 file changed, 33 insertions(+), 10 deletions(-)

diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index e3733534d409..f8c9308817ae 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/bcd.h>
+#include <linux/clk.h>
 #include <linux/init.h>
 #include <linux/iopoll.h>
 #include <linux/module.h>
@@ -22,7 +23,6 @@
 #include <linux/spinlock.h>
 
 #define RZN1_RTC_CTL0 0x00
-#define   RZN1_RTC_CTL0_SLSB_SUBU 0
 #define   RZN1_RTC_CTL0_SLSB_SCMP BIT(4)
 #define   RZN1_RTC_CTL0_AMPM BIT(5)
 #define   RZN1_RTC_CTL0_CE BIT(7)
@@ -49,6 +49,8 @@
 #define   RZN1_RTC_SUBU_DEV BIT(7)
 #define   RZN1_RTC_SUBU_DECR BIT(6)
 
+#define RZN1_RTC_SCMP 0x3c
+
 #define RZN1_RTC_ALM 0x40
 #define RZN1_RTC_ALH 0x44
 #define RZN1_RTC_ALW 0x48
@@ -356,19 +358,20 @@ static int rzn1_rtc_set_offset(struct device *dev, long offset)
 	return 0;
 }
 
-static const struct rtc_class_ops rzn1_rtc_ops = {
+static struct rtc_class_ops rzn1_rtc_ops = {
 	.read_time = rzn1_rtc_read_time,
 	.set_time = rzn1_rtc_set_time,
 	.read_alarm = rzn1_rtc_read_alarm,
 	.set_alarm = rzn1_rtc_set_alarm,
 	.alarm_irq_enable = rzn1_rtc_alarm_irq_enable,
-	.read_offset = rzn1_rtc_read_offset,
-	.set_offset = rzn1_rtc_set_offset,
 };
 
 static int rzn1_rtc_probe(struct platform_device *pdev)
 {
 	struct rzn1_rtc *rtc;
+	struct clk *xtal;
+	unsigned long rate;
+	u32 use_scmp = 0;
 	int irq;
 	int ret;
 
@@ -402,12 +405,32 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
-	/*
-	 * Ensure the clock counter is enabled.
-	 * Set 24-hour mode and possible oscillator offset compensation in SUBU mode.
-	 */
-	writel(RZN1_RTC_CTL0_CE | RZN1_RTC_CTL0_AMPM | RZN1_RTC_CTL0_SLSB_SUBU,
-	       rtc->base + RZN1_RTC_CTL0);
+	/* Only switch to scmp if we have an xtal clock with a valid rate and != 32768 */
+	xtal = devm_clk_get_optional(&pdev->dev, "xtal");
+	if (IS_ERR(xtal)) {
+		ret = PTR_ERR(xtal);
+		goto dis_runtime_pm;
+	} else if (xtal) {
+		rate = clk_get_rate(xtal);
+
+		if (rate < 32000 || rate > BIT(22)) {
+			ret = -EOPNOTSUPP;
+			goto dis_runtime_pm;
+		}
+
+		if (rate != 32768)
+			use_scmp = RZN1_RTC_CTL0_SLSB_SCMP;
+	}
+
+	if (use_scmp) {
+		writel(rate - 1, rtc->base + RZN1_RTC_SCMP);
+	} else {
+		rzn1_rtc_ops.read_offset = rzn1_rtc_read_offset;
+		rzn1_rtc_ops.set_offset = rzn1_rtc_set_offset;
+	}
+
+	/* Ensure clock counter is enabled. Set 24-hour mode and SUBU or SCMP mode */
+	writel(RZN1_RTC_CTL0_CE | RZN1_RTC_CTL0_AMPM | use_scmp, rtc->base + RZN1_RTC_CTL0);
 
 	/* Disable all interrupts */
 	writel(0, rtc->base + RZN1_RTC_CTL1);
-- 
2.47.2

Re: [RFC PATCH 3/4] rtc: rzn1: support input frequencies other than 32768Hz

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 350 bytes --]


> +		if (rate != 32768)
> +			use_scmp = RZN1_RTC_CTL0_SLSB_SCMP;
> +	}
> +
> +	if (use_scmp) {
> +		writel(rate - 1, rtc->base + RZN1_RTC_SCMP);

We need to stop the RTC before writing to this register and setting the
RZN1_RTC_CTL0_SLSB_SCMP bit. I will include this in the next version.
Does not affect the big picture for these changes, though.


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[RFC PATCH 4/4] WIP rtc: rzn1: add driver support for R-Car Gen5

[Wolfram Sang]

This is not for upstream yet. This is a prototype how R-Car Gen5 can be
integrated into this driver. Bindings need to be updated so that they
enforce two input clocks. This patch is only for discussion.

Not-yet-signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/rtc/rtc-rzn1.c | 32 +++++++++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index f8c9308817ae..313e70070904 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -17,6 +17,7 @@
 #include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/rtc.h>
@@ -71,6 +72,10 @@ struct rzn1_rtc {
 	struct rtc_time tm_alarm;
 };
 
+struct rzn1_rtc_conf {
+	unsigned int force_scmp:1;
+};
+
 static void rzn1_rtc_get_time_snapshot(struct rzn1_rtc *rtc, struct rtc_time *tm)
 {
 	u32 val;
@@ -369,6 +374,7 @@ static struct rtc_class_ops rzn1_rtc_ops = {
 static int rzn1_rtc_probe(struct platform_device *pdev)
 {
 	struct rzn1_rtc *rtc;
+	const struct rzn1_rtc_conf *config;
 	struct clk *xtal;
 	unsigned long rate;
 	u32 use_scmp = 0;
@@ -405,7 +411,12 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
-	/* Only switch to scmp if we have an xtal clock with a valid rate and != 32768 */
+	config = of_device_get_match_data(&pdev->dev);
+
+	/*
+	 * Only switch to scmp if we have an xtal clock with a valid rate plus
+	 * either not equal to 32768 or if it is forced in the config
+	 */
 	xtal = devm_clk_get_optional(&pdev->dev, "xtal");
 	if (IS_ERR(xtal)) {
 		ret = PTR_ERR(xtal);
@@ -418,8 +429,14 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
 			goto dis_runtime_pm;
 		}
 
-		if (rate != 32768)
+		if (rate != 32768 || config->force_scmp)
 			use_scmp = RZN1_RTC_CTL0_SLSB_SCMP;
+	} else {
+		/* We need xtal if force_scmp is set */
+		if (config->force_scmp) {
+			ret = -ENOENT;
+			goto dis_runtime_pm;
+		}
 	}
 
 	if (use_scmp) {
@@ -474,8 +491,17 @@ static void rzn1_rtc_remove(struct platform_device *pdev)
 	pm_runtime_put(&pdev->dev);
 }
 
+static const struct rzn1_rtc_conf rzn1_rtc_conf = {
+	.force_scmp = 0,
+};
+
+static const struct rzn1_rtc_conf rzn1_rtc_conf_gen5 = {
+	.force_scmp = 1,
+};
+
 static const struct of_device_id rzn1_rtc_of_match[] = {
-	{ .compatible	= "renesas,rzn1-rtc" },
+	{ .compatible = "renesas,rzn1-rtc", .data = &rzn1_rtc_conf },
+	{ .compatible = "renesas,rcar-gen5-rtc", .data = &rzn1_rtc_conf_gen5 },
 	{},
 };
 MODULE_DEVICE_TABLE(of, rzn1_rtc_of_match);
-- 
2.47.2