Re: [PATCH] vfio/pci: Support 8-byte PCI loads and stores

[Jason Gunthorpe <jgg@ziepe.ca>]

On Fri, Apr 19, 2024 at 03:53:23PM +0200, Gerd Bayer wrote:
> From: Ben Segal <bpsegal@us.ibm.com>
> 
> Many PCI adapters can benefit or even require full 64bit read
> and write access to their registers. In order to enable work on
> user-space drivers for these devices add two new variations
> vfio_pci_core_io{read|write}64 of the existing access methods
> when the architecture supports 64-bit ioreads and iowrites.
> 
> Signed-off-by: Ben Segal <bpsegal@us.ibm.com>
> Co-developed-by: Gerd Bayer <gbayer@linux.ibm.com>
> Signed-off-by: Gerd Bayer <gbayer@linux.ibm.com>
> ---
> 
> Hi all,
> 
> we've successfully used this patch with a user-mode driver for a PCI
> device that requires 64bit register read/writes on s390.

But why? S390 already has a system call for userspace to do the 64 bit
write, and newer S390 has a userspace instruction to do it.

Why would you want to use a VFIO system call on the mmio emulation
path?

mmap the registers and access them normally?

>   * Read or write from an __iomem region (MMIO or I/O port) with an excluded
> @@ -114,7 +117,41 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
>  		else
>  			fillable = 0;
>  
> -		if (fillable >= 4 && !(off % 4)) {
> +		if (fillable >= 8 && !(off % 8)) {
> +#if defined(ioread64) || defined(iowrite64)
> +			u64 val;
> +#endif
> +
> +			if (iswrite) {
> +#ifndef iowrite64
> +				pr_err_once("vfio does not support iowrite64 on this arch");
> +				return -EIO;

can't do that you have to go back to what the old stuff did and do the
4 byte copy.

Jason