From: Kevin Brodsky <kevin.brodsky@arm.com>
To: Jinjie Ruan <ruanjinjie@huawei.com>,
catalin.marinas@arm.com, will@kernel.org, oleg@redhat.com,
chenhuacai@kernel.org, kernel@xen0n.name, hca@linux.ibm.com,
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linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v13 RESEND 12/14] asm-generic: Move TIF_SINGLESTEP to generic TIF bits
Date: Thu, 19 Mar 2026 18:05:48 +0100 [thread overview]
Message-ID: <ad0096a6-91b2-465e-bda2-3fecbdd73570@arm.com> (raw)
In-Reply-To: <20260317082020.737779-13-ruanjinjie@huawei.com>
On 17/03/2026 09:20, Jinjie Ruan wrote:
> Currently, x86, ARM64, s390, and LoongArch all define and use
> TIF_SINGLESTEP to track single-stepping state.
>
> Since this flag is shared across multiple major architectures and serves
> a common purpose in the generic entry/exit paths, move TIF_SINGLESTEP
> into the generic Thread Information Flags (TIF) infrastructure.
>
> This consolidation reduces architecture-specific boilerplate code and
> ensures consistency for generic features that rely on single-step
> state tracking.
>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Acked-by: Heiko Carstens <hca@linux.ibm.com> # s390
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Kevin Brodsky <kevin.brodsky@arm.com>
> ---
> arch/loongarch/include/asm/thread_info.h | 11 +++++------
> arch/s390/include/asm/thread_info.h | 7 +++----
> arch/x86/include/asm/thread_info.h | 6 ++----
> include/asm-generic/thread_info_tif.h | 5 +++++
> 4 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/thread_info.h b/arch/loongarch/include/asm/thread_info.h
> index 4d7117fcdc78..a2ec87f18e1d 100644
> --- a/arch/loongarch/include/asm/thread_info.h
> +++ b/arch/loongarch/include/asm/thread_info.h
> @@ -70,6 +70,7 @@ register unsigned long current_stack_pointer __asm__("$sp");
> */
> #define HAVE_TIF_NEED_RESCHED_LAZY
> #define HAVE_TIF_RESTORE_SIGMASK
> +#define HAVE_TIF_SINGLESTEP
>
> #include <asm-generic/thread_info_tif.h>
>
> @@ -82,11 +83,10 @@ register unsigned long current_stack_pointer __asm__("$sp");
> #define TIF_32BIT_REGS 21 /* 32-bit general purpose registers */
> #define TIF_32BIT_ADDR 22 /* 32-bit address space */
> #define TIF_LOAD_WATCH 23 /* If set, load watch registers */
> -#define TIF_SINGLESTEP 24 /* Single Step */
> -#define TIF_LSX_CTX_LIVE 25 /* LSX context must be preserved */
> -#define TIF_LASX_CTX_LIVE 26 /* LASX context must be preserved */
> -#define TIF_USEDLBT 27 /* LBT was used by this task this quantum (SMP) */
> -#define TIF_LBT_CTX_LIVE 28 /* LBT context must be preserved */
> +#define TIF_LSX_CTX_LIVE 24 /* LSX context must be preserved */
> +#define TIF_LASX_CTX_LIVE 25 /* LASX context must be preserved */
> +#define TIF_USEDLBT 26 /* LBT was used by this task this quantum (SMP) */
> +#define TIF_LBT_CTX_LIVE 27 /* LBT context must be preserved */
>
> #define _TIF_NOHZ BIT(TIF_NOHZ)
> #define _TIF_USEDFPU BIT(TIF_USEDFPU)
> @@ -96,7 +96,6 @@ register unsigned long current_stack_pointer __asm__("$sp");
> #define _TIF_32BIT_REGS BIT(TIF_32BIT_REGS)
> #define _TIF_32BIT_ADDR BIT(TIF_32BIT_ADDR)
> #define _TIF_LOAD_WATCH BIT(TIF_LOAD_WATCH)
> -#define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP)
> #define _TIF_LSX_CTX_LIVE BIT(TIF_LSX_CTX_LIVE)
> #define _TIF_LASX_CTX_LIVE BIT(TIF_LASX_CTX_LIVE)
> #define _TIF_USEDLBT BIT(TIF_USEDLBT)
> diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
> index 1bcd42614e41..95be5258a422 100644
> --- a/arch/s390/include/asm/thread_info.h
> +++ b/arch/s390/include/asm/thread_info.h
> @@ -61,6 +61,7 @@ void arch_setup_new_exec(void);
> */
> #define HAVE_TIF_NEED_RESCHED_LAZY
> #define HAVE_TIF_RESTORE_SIGMASK
> +#define HAVE_TIF_SINGLESTEP
>
> #include <asm-generic/thread_info_tif.h>
>
> @@ -69,15 +70,13 @@ void arch_setup_new_exec(void);
> #define TIF_GUARDED_STORAGE 17 /* load guarded storage control block */
> #define TIF_ISOLATE_BP_GUEST 18 /* Run KVM guests with isolated BP */
> #define TIF_PER_TRAP 19 /* Need to handle PER trap on exit to usermode */
> -#define TIF_SINGLESTEP 21 /* This task is single stepped */
> -#define TIF_BLOCK_STEP 22 /* This task is block stepped */
> -#define TIF_UPROBE_SINGLESTEP 23 /* This task is uprobe single stepped */
> +#define TIF_BLOCK_STEP 20 /* This task is block stepped */
> +#define TIF_UPROBE_SINGLESTEP 21 /* This task is uprobe single stepped */
>
> #define _TIF_ASCE_PRIMARY BIT(TIF_ASCE_PRIMARY)
> #define _TIF_GUARDED_STORAGE BIT(TIF_GUARDED_STORAGE)
> #define _TIF_ISOLATE_BP_GUEST BIT(TIF_ISOLATE_BP_GUEST)
> #define _TIF_PER_TRAP BIT(TIF_PER_TRAP)
> -#define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP)
> #define _TIF_BLOCK_STEP BIT(TIF_BLOCK_STEP)
> #define _TIF_UPROBE_SINGLESTEP BIT(TIF_UPROBE_SINGLESTEP)
>
> diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
> index 0067684afb5b..f59072ba1473 100644
> --- a/arch/x86/include/asm/thread_info.h
> +++ b/arch/x86/include/asm/thread_info.h
> @@ -98,9 +98,8 @@ struct thread_info {
> #define TIF_IO_BITMAP 22 /* uses I/O bitmap */
> #define TIF_SPEC_FORCE_UPDATE 23 /* Force speculation MSR update in context switch */
> #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */
> -#define TIF_SINGLESTEP 25 /* reenable singlestep on user return*/
> -#define TIF_BLOCKSTEP 26 /* set when we want DEBUGCTLMSR_BTF */
> -#define TIF_ADDR32 27 /* 32-bit address space on 64 bits */
> +#define TIF_BLOCKSTEP 25 /* set when we want DEBUGCTLMSR_BTF */
> +#define TIF_ADDR32 26 /* 32-bit address space on 64 bits */
>
> #define _TIF_SSBD BIT(TIF_SSBD)
> #define _TIF_SPEC_IB BIT(TIF_SPEC_IB)
> @@ -112,7 +111,6 @@ struct thread_info {
> #define _TIF_SPEC_FORCE_UPDATE BIT(TIF_SPEC_FORCE_UPDATE)
> #define _TIF_FORCED_TF BIT(TIF_FORCED_TF)
> #define _TIF_BLOCKSTEP BIT(TIF_BLOCKSTEP)
> -#define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP)
> #define _TIF_ADDR32 BIT(TIF_ADDR32)
>
> /* flags to check in __switch_to() */
> diff --git a/include/asm-generic/thread_info_tif.h b/include/asm-generic/thread_info_tif.h
> index da1610a78f92..b277fe06aee3 100644
> --- a/include/asm-generic/thread_info_tif.h
> +++ b/include/asm-generic/thread_info_tif.h
> @@ -48,4 +48,9 @@
> #define TIF_RSEQ 11 // Run RSEQ fast path
> #define _TIF_RSEQ BIT(TIF_RSEQ)
>
> +#ifdef HAVE_TIF_SINGLESTEP
> +#define TIF_SINGLESTEP 12 /* reenable singlestep on user return*/
> +#define _TIF_SINGLESTEP BIT(TIF_SINGLESTEP)
> +#endif
> +
> #endif /* _ASM_GENERIC_THREAD_INFO_TIF_H_ */
next prev parent reply other threads:[~2026-03-19 17:05 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 8:20 [PATCH v13 RESEND 00/14] arm64: entry: Convert to Generic Entry Jinjie Ruan
2026-03-17 8:20 ` [PATCH v13 RESEND 01/14] arm64/ptrace: Refactor syscall_trace_enter/exit() to accept flags parameter Jinjie Ruan
2026-03-19 13:47 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 02/14] arm64/ptrace: Use syscall_get_nr() helper for syscall_trace_enter() Jinjie Ruan
2026-03-19 13:50 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 03/14] arm64/ptrace: Expand secure_computing() in place Jinjie Ruan
2026-03-19 13:58 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 04/14] arm64/ptrace: Use syscall_get_arguments() helper for audit Jinjie Ruan
2026-03-19 14:14 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 05/14] arm64: ptrace: Move rseq_syscall() before audit_syscall_exit() Jinjie Ruan
2026-03-19 14:16 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 06/14] arm64: syscall: Introduce syscall_exit_to_user_mode_work() Jinjie Ruan
2026-03-19 14:17 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 07/14] arm64/ptrace: Define and use _TIF_SYSCALL_EXIT_WORK Jinjie Ruan
2026-03-19 14:18 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 08/14] arm64/ptrace: Skip syscall exit reporting for PTRACE_SYSEMU_SINGLESTEP Jinjie Ruan
2026-03-19 14:20 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 09/14] arm64: entry: Convert to generic entry Jinjie Ruan
2026-03-17 10:58 ` Peter Zijlstra
2026-03-19 14:21 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 10/14] arm64: Inline el0_svc_common() Jinjie Ruan
2026-03-19 14:22 ` Linus Walleij
2026-03-17 8:20 ` [PATCH v13 RESEND 11/14] s390: Rename TIF_SINGLE_STEP to TIF_SINGLESTEP Jinjie Ruan
2026-03-19 14:23 ` Linus Walleij
2026-03-19 17:05 ` Kevin Brodsky
2026-03-17 8:20 ` [PATCH v13 RESEND 12/14] asm-generic: Move TIF_SINGLESTEP to generic TIF bits Jinjie Ruan
2026-03-19 14:24 ` Linus Walleij
2026-03-19 17:05 ` Kevin Brodsky [this message]
2026-03-17 8:20 ` [PATCH v13 RESEND 13/14] arm64: Use generic TIF bits for common thread flags Jinjie Ruan
2026-03-19 14:24 ` Linus Walleij
2026-03-19 17:07 ` Kevin Brodsky
2026-03-20 9:21 ` Jinjie Ruan
2026-03-17 8:20 ` [PATCH v13 RESEND 14/14] selftests: sud_test: Support aarch64 Jinjie Ruan
2026-03-19 14:26 ` Linus Walleij
2026-03-20 9:23 ` Jinjie Ruan
2026-03-17 10:57 ` [PATCH v13 RESEND 00/14] arm64: entry: Convert to Generic Entry Yeoreum Yun
2026-03-19 14:35 ` Linus Walleij
2026-03-20 9:28 ` Jinjie Ruan
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