[PATCH v4 0/3] Add support WP on SMDKV210 and SDHCI_QUIRK_NO_WP_BIT quirk

[PATCH v4 0/3] Add support WP on SMDKV210 and SDHCI_QUIRK_NO_WP_BIT quirk

[Kukjin Kim]

This patch adds support SDMMC write protection pin on SMDKV210.

Changes since v3:
Addressed comments from Kyungmin Park and Marek Szyprowski

- Added pdata 'bool has_gpio_wp' as per Marek
- Moved new WP quirk checking as per Kyungmin

Changes since v2:
Addressed comments from Marek Szyprowski

- modified wp_gpio checking method for support gpio number 0.
- removed unnecessary checking in dev-hsmmc.c

Changes since v1:
Addressed comments from Ben Dooks, Maurus Cuelenaere and Kyungmin Park

- just pass gpio numbers for support WP as Ben's suggestion
- use the gpio layer for specific machine
- use s3c_sdhcix_set_platdata() in machine_init()
- removed unnecessary EXPORT_SYMBOL

Note: Depends on following patch set

[PATCH v2 1/2] ARM: SAMSUNG: Add device definition for HSMMC3
[PATCH v2 2/2] ARM: S5PV210: Add support HSMMC on SMDKV210
[PATCH v4] Samsung: add new card detection methods in s3c-sdhci driver (platform part) from Marek Szyprowski 
[PATCH v4] sdhci-s3c: add support for new card detection methods (driver part) from Marek Szyprowski 

And this patch set includes the following patches:

[PATCH v4 1/3] ARM: SAMSUNG: Add the member of platdata to implement SDMMC Write Protection

[Kukjin Kim]

From: Hyuk Lee <hyuk1.lee@samsung.com>

This patch adds the members of platdata which is wp_gpio.
The wp_gpio is a gpio_number which is connected with WP pin of SD Slot.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/plat-samsung/dev-hsmmc.c          |    2 ++
 arch/arm/plat-samsung/dev-hsmmc1.c         |    2 ++
 arch/arm/plat-samsung/dev-hsmmc2.c         |    2 ++
 arch/arm/plat-samsung/dev-hsmmc3.c         |    2 ++
 arch/arm/plat-samsung/include/plat/sdhci.h |    4 ++++
 5 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index b0f93f1..ce06aa6 100644
--- a/arch/arm/plat-samsung/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
@@ -65,6 +65,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
+	set->has_wp_gpio = pd->has_wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index 1504fd8..d2d9f72 100644
--- a/arch/arm/plat-samsung/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
@@ -65,6 +65,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
+	set->has_wp_gpio = pd->has_wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index b28ef17..34b1ccd 100644
--- a/arch/arm/plat-samsung/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
@@ -66,6 +66,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
+	set->has_wp_gpio = pd->has_wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
index 85aaf0f..9b88c99 100644
--- a/arch/arm/plat-samsung/dev-hsmmc3.c
+++ b/arch/arm/plat-samsung/dev-hsmmc3.c
@@ -69,6 +69,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 	set->ext_cd_cleanup = pd->ext_cd_cleanup;
 	set->ext_cd_gpio = pd->ext_cd_gpio;
 	set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
+	set->wp_gpio = pd->wp_gpio;
+	set->has_wp_gpio = pd->has_wp_gpio;
 
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 7c21a7c..cbf05c6 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -33,6 +33,8 @@ enum cd_types {
  * @max_width: The maximum number of data bits supported.
  * @host_caps: Standard MMC host capabilities bit field.
  * @cd_type: Type of Card Detection method (see cd_types enum above)
+ * @wp_gpio: The gpio number using for WP.
+ * @has_wp_gpio: Check using wp_gpio or not.
  * @ext_cd_init: Initialize external card detect subsystem. Called on
  *		 sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
  *		 notify_func argument is a callback to the sdhci-s3c driver
@@ -62,8 +64,10 @@ struct s3c_sdhci_platdata {
 
 	char		**clocks;	/* set of clock sources */
 
+	int		wp_gpio;
 	int		ext_cd_gpio;
 	bool		ext_cd_gpio_invert;
+	bool		has_wp_gpio;
 	int	(*ext_cd_init)(void (*notify_func)(struct platform_device *,
 						   int state));
 	int	(*ext_cd_cleanup)(void (*notify_func)(struct platform_device *,
-- 
1.6.2.5

[PATCH v4 2/3] ARM: S5PV210: Add support SDMMC WP through EXT_INT on SMDKV210

[Kukjin Kim]

From: Hyuk Lee <hyuk1.lee@samsung.com>

S5PV210 HSMMC host controller doesn't have the Write Protection pin which
should be connnected with SDMMC card WP pin. So send the allocated GPIO number
which is connected with WP pin of SD slot in order to implement get_ro function
in sdhci-s3c.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/mach-s5pv210/mach-smdkv210.c |   26 ++++++++++++++++++++++++++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index d20adf7..5b58278 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -12,6 +12,7 @@
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -29,6 +30,7 @@
 #include <plat/ts.h>
 #include <plat/ata.h>
 #include <plat/keypad.h>
+#include <plat/sdhci.h>
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
@@ -118,6 +120,26 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 	.oversampling_shift	= 2,
 };
 
+static struct s3c_sdhci_platdata smdkv210_hsmmc0_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH0(7),
+	.has_wp_gpio		= true,
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc1_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH0(7),
+	.has_wp_gpio		= true,
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc2_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH3(1),
+	.has_wp_gpio		= true,
+};
+
+static struct s3c_sdhci_platdata smdkv210_hsmmc3_pdata __initdata = {
+	.wp_gpio		= S5PV210_GPH1(0),
+	.has_wp_gpio		= true,
+};
+
 static void __init smdkv210_map_io(void)
 {
 	s5p_init_io(NULL, 0, S5P_VA_CHIPID);
@@ -129,6 +151,10 @@ static void __init smdkv210_machine_init(void)
 {
 	samsung_keypad_set_platdata(&smdkv210_keypad_data);
 	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+	s3c_sdhci0_set_platdata(&smdkv210_hsmmc0_pdata);
+	s3c_sdhci1_set_platdata(&smdkv210_hsmmc1_pdata);
+	s3c_sdhci2_set_platdata(&smdkv210_hsmmc2_pdata);
+	s3c_sdhci3_set_platdata(&smdkv210_hsmmc3_pdata);
 	s3c_ide_set_platdata(&smdkv210_ide_pdata);
 
 	platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
-- 
1.6.2.5

[PATCH v4 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

[Kukjin Kim]

From: Hyuk Lee <hyuk1.lee@samsung.com>

If host controller doesn't have WP pin which should be connnected with SDMMC
card WP pin, can implement get_ro function with using the allocated gpio.
In order to use this quirk wp_gpio in the platform data must be set.

Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 drivers/mmc/host/sdhci-s3c.c |   36 ++++++++++++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |    3 +++
 drivers/mmc/host/sdhci.h     |    3 +++
 3 files changed, 42 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 0d25285..98a8ec8 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -22,6 +22,7 @@
 
 #include <linux/mmc/host.h>
 
+#include <plat/gpio-cfg.h>
 #include <plat/sdhci.h>
 #include <plat/regs-sdhci.h>
 
@@ -213,6 +214,32 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 }
 
 /**
+ * sdhci_s3c_get_ro - callback for get_ro
+ * @host: The SDHCI host being changed
+ *
+ * If the WP pin is connected with GPIO, can get the value which indicates
+ * the card is locked or not.
+*/
+static int sdhci_s3c_get_ro(struct mmc_host *mmc)
+{
+	struct sdhci_s3c *ourhost = to_s3c(mmc_priv(mmc));
+
+	return gpio_get_value(ourhost->pdata->wp_gpio);
+}
+
+/**
+ * sdhci_s3c_cfg_wp - configure GPIO for WP pin
+ * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
+ *
+ * Configure GPIO for using WP line
+*/
+static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
+{
+	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
+	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
+}
+
+/**
  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
  * @host: The SDHCI host being queried
  *
@@ -408,6 +435,15 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
 
+	/* Controller's WP pin doesn't connected with SD card and there is an
+	 * allocated GPIO for getting WP data form SD card, use this quirk and
+	 * send the GPIO number in pdata->wp_gpio. */
+	if (gpio_is_valid(pdata->wp_gpio) && pdata->has_wp_gpio) {
+		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
+		host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
+		sdhci_s3c_cfg_wp(pdata->wp_gpio);
+	}
+
 	ret = sdhci_add_host(host);
 	if (ret) {
 		dev_err(dev, "sdhci_add_host() failed\n");
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index f9ca4c6..7fba401 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
 
 	host = mmc_priv(mmc);
 
+	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
+		return host->ops->get_ro(mmc);
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (host->flags & SDHCI_DEVICE_DEAD)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 0de8b38..dd9a233 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -247,6 +247,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK_MISSING_CAPS			(1<<28)
 /* Controller has nonstandard clock management */
 #define SDHCI_QUIRK_NONSTANDARD_MINCLOCK		(1<<29)
+/* Controller has no write-protect pin connected with SD card */
+#define SDHCI_QUIRK_NO_WP_BIT				(1<<30)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */
@@ -321,6 +323,7 @@ struct sdhci_ops {
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	int		(*get_ro)(struct mmc_host *mmc);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-- 
1.6.2.5

RE: [PATCH v4 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

[Marek Szyprowski]

Hello,

On Tuesday, July 27, 2010 2:44 PM Kukjin Kim wrote:

> From: Hyuk Lee <hyuk1.lee@samsung.com>
> 
> If host controller doesn't have WP pin which should be connnected with
> SDMMC
> card WP pin, can implement get_ro function with using the allocated gpio.
> In order to use this quirk wp_gpio in the platform data must be set.
> 
> Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  drivers/mmc/host/sdhci-s3c.c |   36 ++++++++++++++++++++++++++++++++++++
>  drivers/mmc/host/sdhci.c     |    3 +++
>  drivers/mmc/host/sdhci.h     |    3 +++
>  3 files changed, 42 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index 0d25285..98a8ec8 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -22,6 +22,7 @@
> 
>  #include <linux/mmc/host.h>
> 
> +#include <plat/gpio-cfg.h>
>  #include <plat/sdhci.h>
>  #include <plat/regs-sdhci.h>
> 
> @@ -213,6 +214,32 @@ static void sdhci_s3c_set_clock(struct sdhci_host
> *host, unsigned int clock)
>  }
> 
>  /**
> + * sdhci_s3c_get_ro - callback for get_ro
> + * @host: The SDHCI host being changed
> + *
> + * If the WP pin is connected with GPIO, can get the value which indicates
> + * the card is locked or not.
> +*/
> +static int sdhci_s3c_get_ro(struct mmc_host *mmc)
> +{
> +	struct sdhci_s3c *ourhost = to_s3c(mmc_priv(mmc));
> +
> +	return gpio_get_value(ourhost->pdata->wp_gpio);
> +}
> +
> +/**
> + * sdhci_s3c_cfg_wp - configure GPIO for WP pin
> + * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
> + *
> + * Configure GPIO for using WP line
> +*/
> +static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
> +{
> +	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
> +	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
> +}
> +
> +/**
>   * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
>   * @host: The SDHCI host being queried
>   *
> @@ -408,6 +435,15 @@ static int __devinit sdhci_s3c_probe(struct
> platform_device *pdev)
>  	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
>  			 SDHCI_QUIRK_32BIT_DMA_SIZE);
> 
> +	/* Controller's WP pin doesn't connected with SD card and there is an
> +	 * allocated GPIO for getting WP data form SD card, use this quirk
> and
> +	 * send the GPIO number in pdata->wp_gpio. */
> +	if (gpio_is_valid(pdata->wp_gpio) && pdata->has_wp_gpio) {

IMHO the opposite order would make much more sense:
if (pdata->has_wp_gpio && gpio_is_valid(pdata->wp_gpio))

> +		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
> +		host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
> +		sdhci_s3c_cfg_wp(pdata->wp_gpio);
> +	}
> +
>  	ret = sdhci_add_host(host);
>  	if (ret) {
>  		dev_err(dev, "sdhci_add_host() failed\n");
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index f9ca4c6..7fba401 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
> 
>  	host = mmc_priv(mmc);
> 
> +	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
> +		return host->ops->get_ro(mmc);
> +
>  	spin_lock_irqsave(&host->lock, flags);
> 
>  	if (host->flags & SDHCI_DEVICE_DEAD)
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 0de8b38..dd9a233 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -247,6 +247,8 @@ struct sdhci_host {
>  #define SDHCI_QUIRK_MISSING_CAPS			(1<<28)
>  /* Controller has nonstandard clock management */
>  #define SDHCI_QUIRK_NONSTANDARD_MINCLOCK		(1<<29)
> +/* Controller has no write-protect pin connected with SD card */
> +#define SDHCI_QUIRK_NO_WP_BIT				(1<<30)
> 
>  	int			irq;		/* Device IRQ */
>  	void __iomem *		ioaddr;		/* Mapped address */
> @@ -321,6 +323,7 @@ struct sdhci_ops {
>  	unsigned int	(*get_max_clock)(struct sdhci_host *host);
>  	unsigned int	(*get_min_clock)(struct sdhci_host *host);
>  	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
> +	int		(*get_ro)(struct mmc_host *mmc);
>  };
> 
>  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

Otherwise looks fine.

Best regards
--
Marek Szyprowski
Samsung Poland R&D Center

RE: [PATCH v4 3/3] sdhci-s3c: Add SDHCI_QUIRK_NO_WP_BIT quirk for Samsung SoC

[Kukjin Kim]

Marek Szyprowski wrote:
> 
> Hello,

Hi :-)
> 
> On Tuesday, July 27, 2010 2:44 PM Kukjin Kim wrote:
> 
> > From: Hyuk Lee <hyuk1.lee@samsung.com>
> >
> > If host controller doesn't have WP pin which should be connnected with
> > SDMMC
> > card WP pin, can implement get_ro function with using the allocated
gpio.
> > In order to use this quirk wp_gpio in the platform data must be set.
> >
> > Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  drivers/mmc/host/sdhci-s3c.c |   36
> ++++++++++++++++++++++++++++++++++++
> >  drivers/mmc/host/sdhci.c     |    3 +++
> >  drivers/mmc/host/sdhci.h     |    3 +++
> >  3 files changed, 42 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> > index 0d25285..98a8ec8 100644
> > --- a/drivers/mmc/host/sdhci-s3c.c
> > +++ b/drivers/mmc/host/sdhci-s3c.c
> > @@ -22,6 +22,7 @@
> >
> >  #include <linux/mmc/host.h>
> >
> > +#include <plat/gpio-cfg.h>
> >  #include <plat/sdhci.h>
> >  #include <plat/regs-sdhci.h>
> >
> > @@ -213,6 +214,32 @@ static void sdhci_s3c_set_clock(struct sdhci_host
> > *host, unsigned int clock)
> >  }
> >
> >  /**
> > + * sdhci_s3c_get_ro - callback for get_ro
> > + * @host: The SDHCI host being changed
> > + *
> > + * If the WP pin is connected with GPIO, can get the value which
indicates
> > + * the card is locked or not.
> > +*/
> > +static int sdhci_s3c_get_ro(struct mmc_host *mmc)
> > +{
> > +	struct sdhci_s3c *ourhost = to_s3c(mmc_priv(mmc));
> > +
> > +	return gpio_get_value(ourhost->pdata->wp_gpio);
> > +}
> > +
> > +/**
> > + * sdhci_s3c_cfg_wp - configure GPIO for WP pin
> > + * @gpio_num: GPIO number which connected with WP line from SD/MMC slot
> > + *
> > + * Configure GPIO for using WP line
> > +*/
> > +static void sdhci_s3c_cfg_wp(unsigned int gpio_num)
> > +{
> > +	s3c_gpio_cfgpin(gpio_num, S3C_GPIO_INPUT);
> > +	s3c_gpio_setpull(gpio_num, S3C_GPIO_PULL_UP);
> > +}
> > +
> > +/**
> >   * sdhci_s3c_get_min_clock - callback to get minimal supported clock
value
> >   * @host: The SDHCI host being queried
> >   *
> > @@ -408,6 +435,15 @@ static int __devinit sdhci_s3c_probe(struct
> > platform_device *pdev)
> >  	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
> >  			 SDHCI_QUIRK_32BIT_DMA_SIZE);
> >
> > +	/* Controller's WP pin doesn't connected with SD card and there is
an
> > +	 * allocated GPIO for getting WP data form SD card, use this quirk
> > and
> > +	 * send the GPIO number in pdata->wp_gpio. */
> > +	if (gpio_is_valid(pdata->wp_gpio) && pdata->has_wp_gpio) {
> 
> IMHO the opposite order would make much more sense:
> if (pdata->has_wp_gpio && gpio_is_valid(pdata->wp_gpio))
> 
Ok..will modify.

> > +		sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro;
> > +		host->quirks |= SDHCI_QUIRK_NO_WP_BIT;
> > +		sdhci_s3c_cfg_wp(pdata->wp_gpio);
> > +	}
> > +
> >  	ret = sdhci_add_host(host);
> >  	if (ret) {
> >  		dev_err(dev, "sdhci_add_host() failed\n");
> > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> > index f9ca4c6..7fba401 100644
> > --- a/drivers/mmc/host/sdhci.c
> > +++ b/drivers/mmc/host/sdhci.c
> > @@ -1198,6 +1198,9 @@ static int sdhci_get_ro(struct mmc_host *mmc)
> >
> >  	host = mmc_priv(mmc);
> >
> > +	if ((host->quirks & SDHCI_QUIRK_NO_WP_BIT) && host->ops->get_ro)
> > +		return host->ops->get_ro(mmc);
> > +
> >  	spin_lock_irqsave(&host->lock, flags);
> >
> >  	if (host->flags & SDHCI_DEVICE_DEAD)
> > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> > index 0de8b38..dd9a233 100644
> > --- a/drivers/mmc/host/sdhci.h
> > +++ b/drivers/mmc/host/sdhci.h
> > @@ -247,6 +247,8 @@ struct sdhci_host {
> >  #define SDHCI_QUIRK_MISSING_CAPS			(1<<28)
> >  /* Controller has nonstandard clock management */
> >  #define SDHCI_QUIRK_NONSTANDARD_MINCLOCK		(1<<29)
> > +/* Controller has no write-protect pin connected with SD card */
> > +#define SDHCI_QUIRK_NO_WP_BIT				(1<<30)
> >
> >  	int			irq;		/* Device IRQ */
> >  	void __iomem *		ioaddr;		/* Mapped address */
> > @@ -321,6 +323,7 @@ struct sdhci_ops {
> >  	unsigned int	(*get_max_clock)(struct sdhci_host *host);
> >  	unsigned int	(*get_min_clock)(struct sdhci_host *host);
> >  	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
> > +	int		(*get_ro)(struct mmc_host *mmc);
> >  };
> >
> >  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> 
> Otherwise looks fine.
> 
Thanks for your comment.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.