Re: [PATCH v6 08/15] drm/exynos: dsi: rename pll_clk to sclk_clk

Re: [PATCH v6 08/15] drm/exynos: dsi: rename pll_clk to sclk_clk

[Inki Dae]

+ Samsung SoC mailing list.

On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
> This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
> is actually not the pll input clock for dsi. The pll input clock comes
> from the board's oscillator directly. But for the backward
> compatibility, the old clock name "pll_clk" is also OK.
> 
> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
> ---
> Changes before:
> - Refer https://patchwork.kernel.org/patch/6191721
> Changes for v6:
> - Merged 2 patches
>    drm/exynos: dsi: add the backward compatibility for the renamed clock
>    drm/exynos: dsi: rename pll_clk to sclk_clk
> 
>  .../devicetree/bindings/video/exynos_dsim.txt      |  7 +++--
>  drivers/gpu/drm/exynos/exynos_drm_dsi.c            | 36 ++++++++++------------
>  2 files changed, 20 insertions(+), 23 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt
> index 802aa7e..44659dd 100644
> --- a/Documentation/devicetree/bindings/video/exynos_dsim.txt
> +++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt
> @@ -10,13 +10,14 @@ Required properties:
>    - interrupts: should contain DSI interrupt
>    - clocks: list of clock specifiers, must contain an entry for each required
>      entry in clock-names
> -  - clock-names: should include "bus_clk"and "pll_clk" entries
> +  - clock-names: should include "bus_clk"and "sclk_mipi" entries
> +		 the use of "pll_clk" is deprecated
>    - phys: list of phy specifiers, must contain an entry for each required
>      entry in phy-names
>    - phy-names: should include "dsim" entry
>    - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
>    - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
> -  - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock
> +  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock
>    - #address-cells, #size-cells: should be set respectively to <1> and <0>
>      according to DSI host bindings (see MIPI DSI bindings [1])
> 
> @@ -48,7 +49,7 @@ Example:
>  		reg = <0x11C80000 0x10000>;
>  		interrupts = <0 79 0>;
>  		clocks = <&clock 286>, <&clock 143>;
> -		clock-names = "bus_clk", "pll_clk";
> +		clock-names = "bus_clk", "sclk_mipi";
>  		phys = <&mipi_phy 1>;
>  		phy-names = "dsim";
>  		vddcore-supply = <&vusb_reg>;
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> index c1999ad..a3bfac2 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> @@ -235,6 +235,8 @@
>  #define DSI_XFER_TIMEOUT_MS		100
>  #define DSI_RX_FIFO_EMPTY		0x30800002
> 
> +#define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
> +
>  enum exynos_dsi_transfer_type {
>  	EXYNOS_DSI_TX,
>  	EXYNOS_DSI_RX,
> @@ -279,7 +281,7 @@ struct exynos_dsi {
> 
>  	void __iomem *reg_base;
>  	struct phy *phy;
> -	struct clk *pll_clk;
> +	struct clk *sclk_clk;
>  	struct clk *bus_clk;
>  	struct regulator_bulk_data supplies[2];
>  	int irq;
> @@ -433,16 +435,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi,
>  	u16 m;
>  	u32 reg;
> 
> -	clk_set_rate(dsi->pll_clk, dsi->pll_clk_rate);
> -
> -	fin = clk_get_rate(dsi->pll_clk);
> -	if (!fin) {
> -		dev_err(dsi->dev, "failed to get PLL clock frequency\n");
> -		return 0;
> -	}
> -
> -	dev_dbg(dsi->dev, "PLL input frequency: %lu\n", fin);
> -
> +	fin = dsi->pll_clk_rate;
>  	fout = exynos_dsi_pll_find_pms(dsi, fin, freq, &p, &m, &s);
>  	if (!fout) {
>  		dev_err(dsi->dev,
> @@ -1313,10 +1306,10 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
>  		goto err_bus_clk;
>  	}
> 
> -	ret = clk_prepare_enable(dsi->pll_clk);
> +	ret = clk_prepare_enable(dsi->sclk_clk);
>  	if (ret < 0) {
>  		dev_err(dsi->dev, "cannot enable pll clock %d\n", ret);
> -		goto err_pll_clk;
> +		goto err_sclk_clk;
>  	}
> 
>  	ret = phy_power_on(dsi->phy);
> @@ -1328,8 +1321,8 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
>  	return 0;
> 
>  err_phy:
> -	clk_disable_unprepare(dsi->pll_clk);
> -err_pll_clk:
> +	clk_disable_unprepare(dsi->sclk_clk);
> +err_sclk_clk:
>  	clk_disable_unprepare(dsi->bus_clk);
>  err_bus_clk:
>  	regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
> @@ -1355,7 +1348,7 @@ static void exynos_dsi_poweroff(struct exynos_dsi *dsi)
> 
>  	phy_power_off(dsi->phy);
> 
> -	clk_disable_unprepare(dsi->pll_clk);
> +	clk_disable_unprepare(dsi->sclk_clk);
>  	clk_disable_unprepare(dsi->bus_clk);
> 
>  	ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
> @@ -1722,10 +1715,13 @@ static int exynos_dsi_probe(struct platform_device *pdev)
>  		return -EPROBE_DEFER;
>  	}
> 
> -	dsi->pll_clk = devm_clk_get(dev, "pll_clk");
> -	if (IS_ERR(dsi->pll_clk)) {
> -		dev_info(dev, "failed to get dsi pll input clock\n");
> -		return PTR_ERR(dsi->pll_clk);
> +	dsi->sclk_clk = devm_clk_get(dev, "sclk_mipi");
> +	if (IS_ERR(dsi->sclk_clk)) {
> +		dsi->sclk_clk = devm_clk_get(dev, OLD_SCLK_MIPI_CLK_NAME);
> +		if (IS_ERR(dsi->sclk_clk)) {
> +			dev_info(dev, "failed to get dsi sclk clock\n");
> +			eturn PTR_ERR(dsi->sclk_clk);
> +		}
>  	}
> 
>  	dsi->bus_clk = devm_clk_get(dev, "bus_clk");
> --
> 1.9.1
> 
> --
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Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Krzysztof Kozlowski]

2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
> + Krzysztof
>
> On 2015년 06월 22일 18:10, Inki Dae wrote:
>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>> The clock which was named as 'pll_clk' is actually not the clock source
>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>
>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>> like to merge this patch to mainline through drm-next.

Dear Hyungwon Hwang,

Please always CC samsung-soc mailing list on such patches. I won't
receive it on my personal email if you don't CC the list. The
get_maintainers.pl gives necessary addresses.

Comment below,

>>
>> Thanks,
>> Inki Dae
>>
>>>
>>> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
>>> ---
>>> Changes before:
>>> - Refer https://patchwork.kernel.org/patch/6191811
>>> Changes for v6:
>>> - None
>>>
>>>  arch/arm/boot/dts/exynos4.dtsi | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
>>> index e20cdc2..1538d7a 100644
>>> --- a/arch/arm/boot/dts/exynos4.dtsi
>>> +++ b/arch/arm/boot/dts/exynos4.dtsi
>>> @@ -167,7 +167,7 @@
>>>              phys = <&mipi_phy 1>;
>>>              phy-names = "dsim";
>>>              clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
>>> -            clock-names = "bus_clk", "pll_clk";
>>> +            clock-names = "bus_clk", "sclk_mipi";

It seems wrong. The driver fetches reference from a name of "pll_clk",
not "sclk_mipi". Also bindings documentation mentions pll_clk and
bus_clk only.

Best regards,
Krzysztof


>>>              status = "disabled";
>>>              #address-cells = <1>;
>>>              #size-cells = <0>;
>>> --
>>> 1.9.1
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>>> the body of a message to majordomo@vger.kernel.org
>>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>>
>>
>

Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Inki Dae]

On 2015년 06월 22일 20:59, Krzysztof Kozlowski wrote:
> 2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
>> + Krzysztof
>>
>> On 2015년 06월 22일 18:10, Inki Dae wrote:
>>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>>> The clock which was named as 'pll_clk' is actually not the clock source
>>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>>
>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>> like to merge this patch to mainline through drm-next.
> 
> Dear Hyungwon Hwang,
> 
> Please always CC samsung-soc mailing list on such patches. I won't
> receive it on my personal email if you don't CC the list. The
> get_maintainers.pl gives necessary addresses.
> 
> Comment below,
> 
>>>
>>> Thanks,
>>> Inki Dae
>>>
>>>>
>>>> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
>>>> ---
>>>> Changes before:
>>>> - Refer https://patchwork.kernel.org/patch/6191811
>>>> Changes for v6:
>>>> - None
>>>>
>>>>  arch/arm/boot/dts/exynos4.dtsi | 2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
>>>> index e20cdc2..1538d7a 100644
>>>> --- a/arch/arm/boot/dts/exynos4.dtsi
>>>> +++ b/arch/arm/boot/dts/exynos4.dtsi
>>>> @@ -167,7 +167,7 @@
>>>>              phys = <&mipi_phy 1>;
>>>>              phy-names = "dsim";
>>>>              clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
>>>> -            clock-names = "bus_clk", "pll_clk";
>>>> +            clock-names = "bus_clk", "sclk_mipi";
> 
> It seems wrong. The driver fetches reference from a name of "pll_clk",
> not "sclk_mipi". Also bindings documentation mentions pll_clk and
> bus_clk only.

Krzysztof,

There is your missing point. The driver is already considered for
pll_clk also. See the below codes,

#define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
...

	for (i = 0; i < dsi->driver_data->num_clks; i++) {
		dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
		if (IS_ERR(dsi->clks[i])) {
			if (strcmp(clk_names[i], "sclk_mipi") == 0) {
				strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
				i--;
				continue;
			}

			dev_info(dev, "failed to get the clock: %s\n",
					clk_names[i]);
			return PTR_ERR(dsi->clks[i]);
		}
	}

Above codes make the driver to try to get the pll_clk - defined as
OLD_SCLK_MIPI_CLK_NAME macro - again if getting sclk_mipi clock failed
so there is no problem even though a little bit ugly.

As you know, we should guarantee the backward compatibility so this
codes check two clock names.

Thanks,
Inki Dae

> 
> Best regards,
> Krzysztof
> 
> 
>>>>              status = "disabled";
>>>>              #address-cells = <1>;
>>>>              #size-cells = <0>;
>>>> --
>>>> 1.9.1
>>>>
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>>>> the body of a message to majordomo@vger.kernel.org
>>>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>>>
>>>
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> 

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Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Krzysztof Kozlowski]

2015-06-22 21:10 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
> On 2015년 06월 22일 20:59, Krzysztof Kozlowski wrote:
>> 2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
>>> + Krzysztof
>>>
>>> On 2015년 06월 22일 18:10, Inki Dae wrote:
>>>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>>>> The clock which was named as 'pll_clk' is actually not the clock source
>>>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>>>
>>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>>> like to merge this patch to mainline through drm-next.
>>
>> Dear Hyungwon Hwang,
>>
>> Please always CC samsung-soc mailing list on such patches. I won't
>> receive it on my personal email if you don't CC the list. The
>> get_maintainers.pl gives necessary addresses.
>>
>> Comment below,
>>
>>>>
>>>> Thanks,
>>>> Inki Dae
>>>>
>>>>>
>>>>> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
>>>>> ---
>>>>> Changes before:
>>>>> - Refer https://patchwork.kernel.org/patch/6191811
>>>>> Changes for v6:
>>>>> - None
>>>>>
>>>>>  arch/arm/boot/dts/exynos4.dtsi | 2 +-
>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
>>>>> index e20cdc2..1538d7a 100644
>>>>> --- a/arch/arm/boot/dts/exynos4.dtsi
>>>>> +++ b/arch/arm/boot/dts/exynos4.dtsi
>>>>> @@ -167,7 +167,7 @@
>>>>>              phys = <&mipi_phy 1>;
>>>>>              phy-names = "dsim";
>>>>>              clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
>>>>> -            clock-names = "bus_clk", "pll_clk";
>>>>> +            clock-names = "bus_clk", "sclk_mipi";
>>
>> It seems wrong. The driver fetches reference from a name of "pll_clk",
>> not "sclk_mipi". Also bindings documentation mentions pll_clk and
>> bus_clk only.
>
> Krzysztof,
>
> There is your missing point. The driver is already considered for
> pll_clk also. See the below codes,
>
> #define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
> ...
>
>         for (i = 0; i < dsi->driver_data->num_clks; i++) {
>                 dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
>                 if (IS_ERR(dsi->clks[i])) {
>                         if (strcmp(clk_names[i], "sclk_mipi") == 0) {
>                                 strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
>                                 i--;
>                                 continue;
>                         }
>
>                         dev_info(dev, "failed to get the clock: %s\n",
>                                         clk_names[i]);
>                         return PTR_ERR(dsi->clks[i]);
>                 }
>         }
>
> Above codes make the driver to try to get the pll_clk - defined as
> OLD_SCLK_MIPI_CLK_NAME macro - again if getting sclk_mipi clock failed
> so there is no problem even though a little bit ugly.
>
> As you know, we should guarantee the backward compatibility so this
> codes check two clock names.

I am looking at next-20150622 and file
drivers/gpu/drm/exynos/exynos_drm_dsi.c. There is no such code there.
There is only pll_clk. No sclk_mipi.

Maybe it was changed by other patch... but I haven't received it. Also
I cannot find such patch on linux-kernel, linux-arm-kernel and
linux-samsung-soc. I cannot ack something that I cannot see :) .

If you sent whole patchset to my office address, then I will look at
it tomorrow. From home I can only look at LKML patches.

Best regards,
Krzysztof
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Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Krzysztof Kozlowski]

2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
> + Krzysztof
>
> On 2015년 06월 22일 18:10, Inki Dae wrote:
>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>> The clock which was named as 'pll_clk' is actually not the clock source
>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>
>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>> like to merge this patch to mainline through drm-next.

Thanks for forwarding me other necessary patch. All that burden could
be easily avoided by sending everything to samsung-soc anyway.

The patch itself looks good:
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

Best regards,
Krzysztof

>>
>> Thanks,
>> Inki Dae
>>
>>>
>>> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
>>> ---
>>> Changes before:
>>> - Refer https://patchwork.kernel.org/patch/6191811
>>> Changes for v6:
>>> - None
>>>
>>>  arch/arm/boot/dts/exynos4.dtsi | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
>>> index e20cdc2..1538d7a 100644
>>> --- a/arch/arm/boot/dts/exynos4.dtsi
>>> +++ b/arch/arm/boot/dts/exynos4.dtsi
>>> @@ -167,7 +167,7 @@
>>>              phys = <&mipi_phy 1>;
>>>              phy-names = "dsim";
>>>              clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
>>> -            clock-names = "bus_clk", "pll_clk";
>>> +            clock-names = "bus_clk", "sclk_mipi";
>>>              status = "disabled";
>>>              #address-cells = <1>;
>>>              #size-cells = <0>;
>>> --
>>> 1.9.1
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>>> the body of a message to majordomo@vger.kernel.org
>>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>>
>>
>

Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Krzysztof Kozlowski]

2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski <k.kozlowski@samsung.com>:
> 2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
>> + Krzysztof
>>
>> On 2015년 06월 22일 18:10, Inki Dae wrote:
>>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>>> The clock which was named as 'pll_clk' is actually not the clock source
>>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>>
>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>> like to merge this patch to mainline through drm-next.
>
> Thanks for forwarding me other necessary patch. All that burden could
> be easily avoided by sending everything to samsung-soc anyway.
>
> The patch itself looks good:
> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>
> Best regards,
> Krzysztof

To clarify. There were seven versions of this patch and none of them
were sent to samsung-soc list, to Kukjin Kim or to me.

I also wonder about patch 2: "of: add helper for getting endpoint node
with specific identifiers"
for which I can't find respective ack from Rob Herring (+Cc). I only found this:
http://www.spinics.net/lists/devicetree/msg69336.html
but there are only comments, not an ack.

Best regards,
Krzysztof

Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Inki Dae]

On 2015년 06월 23일 11:10, Krzysztof Kozlowski wrote:
> 2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski <k.kozlowski@samsung.com>:
>> 2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
>>> + Krzysztof
>>>
>>> On 2015년 06월 22일 18:10, Inki Dae wrote:
>>>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>>>> The clock which was named as 'pll_clk' is actually not the clock source
>>>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>>>
>>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>>> like to merge this patch to mainline through drm-next.
>>
>> Thanks for forwarding me other necessary patch. All that burden could
>> be easily avoided by sending everything to samsung-soc anyway.
>>
>> The patch itself looks good:
>> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>
>> Best regards,
>> Krzysztof
> 
> To clarify. There were seven versions of this patch and none of them
> were sent to samsung-soc list, to Kukjin Kim or to me.
> 
> I also wonder about patch 2: "of: add helper for getting endpoint node
> with specific identifiers"
> for which I can't find respective ack from Rob Herring (+Cc). I only found this:
> http://www.spinics.net/lists/devicetree/msg69336.html
> but there are only comments, not an ack.

Below is the comments from Rob Herring. How about subscribing device
tree mainling list? You are a maintainer of Exynos SoC. This patch was
posted to device tree mailing list ccing Grant and Rob. If you listen to
only Samsung SoC mailing list then you couldn't find this patch in your
email box.

"On Sun, Feb 22, 2015 at 7:41 PM, Hyungwon Hwang
<human.hwang@samsung.com> wrote:
 > When there are multiple ports or multiple endpoints in a port, they
have to be
 > distinguished by the value of reg property. It is common. The drivers
can get
 > the specific endpoint in the specific port via this function. Now the
drivers
 > have to implement this code in themselves or have to force the order
of dt nodes
 > to get the right node.
 >
 > Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>

Acked-by: Rob Herring <robh@kernel.org>

 I'm not applying as there is no user, so apply this patch along with a
 user of the function."

That is why I merged this patch to exynos-drm-next.

Thanks,
Inki Dae

> 
> Best regards,
> Krzysztof
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> 

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Re: [PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Krzysztof Kozlowski]

On 23.06.2015 11:28, Inki Dae wrote:
> On 2015년 06월 23일 11:10, Krzysztof Kozlowski wrote:
>> 2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski <k.kozlowski@samsung.com>:
>>> 2015-06-22 20:42 GMT+09:00 Inki Dae <inki.dae@samsung.com>:
>>>> + Krzysztof
>>>>
>>>> On 2015년 06월 22일 18:10, Inki Dae wrote:
>>>>> On 2015년 06월 12일 21:59, Hyungwon Hwang wrote:
>>>>>> The clock which was named as 'pll_clk' is actually not the clock source
>>>>>> of PLL in MIPI DSI. This patch fixes this disagreement.
>>>>>
>>>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>>>> like to merge this patch to mainline through drm-next.
>>>
>>> Thanks for forwarding me other necessary patch. All that burden could
>>> be easily avoided by sending everything to samsung-soc anyway.
>>>
>>> The patch itself looks good:
>>> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>>
>>> Best regards,
>>> Krzysztof
>>
>> To clarify. There were seven versions of this patch and none of them
>> were sent to samsung-soc list, to Kukjin Kim or to me.
>>
>> I also wonder about patch 2: "of: add helper for getting endpoint node
>> with specific identifiers"
>> for which I can't find respective ack from Rob Herring (+Cc). I only found this:
>> http://www.spinics.net/lists/devicetree/msg69336.html
>> but there are only comments, not an ack.
> 
> Below is the comments from Rob Herring. How about subscribing device
> tree mainling list? You are a maintainer of Exynos SoC. This patch was
> posted to device tree mailing list ccing Grant and Rob. If you listen to
> only Samsung SoC mailing list then you couldn't find this patch in your
> email box.

Some time ago I was subscribing devicetree, but as I am not device tree
maintainer and the traffic there is really huge, I unsubscribed.

> 
> "On Sun, Feb 22, 2015 at 7:41 PM, Hyungwon Hwang
> <human.hwang@samsung.com> wrote:
>  > When there are multiple ports or multiple endpoints in a port, they
> have to be
>  > distinguished by the value of reg property. It is common. The drivers
> can get
>  > the specific endpoint in the specific port via this function. Now the
> drivers
>  > have to implement this code in themselves or have to force the order
> of dt nodes
>  > to get the right node.
>  >
>  > Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
> 
> Acked-by: Rob Herring <robh@kernel.org>
> 
>  I'm not applying as there is no user, so apply this patch along with a
>  user of the function."

Thanks! That helped me finding it in the archives.

Best regards,
Krzysztof

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