[PATCH 0/4] Exynos SROMc configuration and Ethernet support for SMDK5410

[PATCH 0/4] Exynos SROMc configuration and Ethernet support for SMDK5410

[Pavel Fedin]

This patch extends Exynos SROM controller driver with ability to configure
controller outputs and enables SMSC9115 Ethernet chip on SMDK5410 board,
which is connected via SROMc bank #3.

With this patch, support for the whole existing SMDK range can be added.
Actually, only bank number is different.

This patchset also depends on Exynos 5410 pinctrl support, introduced by
patches 0003 and 0004 from this set:
[PATCH v4 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/330862.html

Pinctrl support is necessary in order to correctly configure
multifunctional pins of the Exynos chip.

Pavel Fedin (4):
  ARM: dts: Add SROMc to Exynos 5410
  drivers: exynos-srom: Add support for bank configuration
  ARM: dts: Add Ethernet chip to SMDK5410
  Documentation: dt-bindings: Describe SROMc configuration

 .../bindings/arm/samsung/exynos-srom.txt           | 19 +++++++++-
 arch/arm/boot/dts/exynos5410-smdk5410.dts          | 42 ++++++++++++++++++++++
 arch/arm/boot/dts/exynos5410.dtsi                  |  5 +++
 arch/arm/mach-exynos/Kconfig                       |  2 +-
 drivers/soc/samsung/Kconfig                        |  2 +-
 drivers/soc/samsung/exynos-srom.c                  | 42 +++++++++++++++++++++-
 6 files changed, 108 insertions(+), 4 deletions(-)

-- 
2.4.4

[PATCH 1/4] ARM: dts: Add SROMc to Exynos 5410

[Pavel Fedin]

This machine uses own SoC device tree file, add missing part.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
---
 arch/arm/boot/dts/exynos5410.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 4603356..91dd302 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -101,6 +101,11 @@
 			reg = <0x10000000 0x100>;
 		};
 
+		sromc_0: sromc@12250000 {
+			compatible = "samsung,exynos-srom";
+			reg = <0x12250000 0x10>;
+		};
+
 		pmu_system_controller: system-controller@10040000 {
 			compatible = "samsung,exynos5410-pmu", "syscon";
 			reg = <0x10040000 0x5000>;
-- 
2.4.4

Re: [PATCH 1/4] ARM: dts: Add SROMc to Exynos 5410

[Pankaj Dubey]

Hi Pavel,

On Monday 26 October 2015 05:17 PM, Pavel Fedin wrote:
> This machine uses own SoC device tree file, add missing part.
>
> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
> ---
>   arch/arm/boot/dts/exynos5410.dtsi | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 4603356..91dd302 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -101,6 +101,11 @@
>   			reg = <0x10000000 0x100>;
>   		};
>
> +		sromc_0: sromc@12250000 {

Why sromc_0? Does this SoC have more than one srom controllers?

> +			compatible = "samsung,exynos-srom";
> +			reg = <0x12250000 0x10>;
> +		};
> +
>   		pmu_system_controller: system-controller@10040000 {
>   			compatible = "samsung,exynos5410-pmu", "syscon";
>   			reg = <0x10040000 0x5000>;
>

Thanks,
Pankaj Dubey

[PATCH 2/4] drivers: exynos-srom: Add support for bank configuration

[Pavel Fedin]

Bindings are based on u-boot implementation, however they are stored in
subnodes, providing support for more than one bank.

Since the driver now does more than suspend-resume support, dependency on
CONFIG_PM is removed.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
---
 arch/arm/mach-exynos/Kconfig      |  2 +-
 drivers/soc/samsung/Kconfig       |  2 +-
 drivers/soc/samsung/exynos-srom.c | 42 ++++++++++++++++++++++++++++++++++++++-
 3 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 83c85f5..c22dc42 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -16,7 +16,7 @@ menuconfig ARCH_EXYNOS
 	select ARM_GIC
 	select COMMON_CLK_SAMSUNG
 	select EXYNOS_THERMAL
-	select EXYNOS_SROM if PM
+	select EXYNOS_SROM
 	select HAVE_ARM_SCU if SMP
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
index 2833b5b..ea4bc2a 100644
--- a/drivers/soc/samsung/Kconfig
+++ b/drivers/soc/samsung/Kconfig
@@ -8,6 +8,6 @@ config SOC_SAMSUNG
 
 config EXYNOS_SROM
 	bool
-	depends on ARM && ARCH_EXYNOS && PM
+	depends on ARM && ARCH_EXYNOS
 
 endmenu
diff --git a/drivers/soc/samsung/exynos-srom.c b/drivers/soc/samsung/exynos-srom.c
index 57a232d..6c8c56a 100644
--- a/drivers/soc/samsung/exynos-srom.c
+++ b/drivers/soc/samsung/exynos-srom.c
@@ -67,9 +67,46 @@ static struct exynos_srom_reg_dump *exynos_srom_alloc_reg_dump(
 	return rd;
 }
 
+static int decode_sromc(struct exynos_srom *srom, struct device_node *np)
+{
+	u32 bank, width;
+	u32 timing[7];
+	u32 bw;
+
+	if (of_property_read_u32(np, "bank", &bank))
+		return -ENXIO;
+	if (of_property_read_u32(np, "width", &width))
+		width = 1;
+	if (of_property_read_u32_array(np, "srom-timing", timing, 7)) {
+		pr_err("Could not decode SROMC configuration\n");
+		return -ENXIO;
+	}
+
+	bank *= 4; /* Convert bank into shift/offset */
+
+	bw = 1 << EXYNOS_SROM_BW__BYTEENABLE__SHIFT;
+	if (width == 2)
+		bw |= 1 << EXYNOS_SROM_BW__DATAWIDTH__SHIFT;
+	bw <<= bank;
+	bw |= __raw_readl(srom->reg_base + EXYNOS_SROM_BW) &
+	      ~(EXYNOS_SROM_BW__CS_MASK << bank);
+	__raw_writel(bw, srom->reg_base + EXYNOS_SROM_BW);
+
+	__raw_writel((timing[0] << EXYNOS_SROM_BCX__PMC__SHIFT) |
+		    (timing[1] << EXYNOS_SROM_BCX__TACP__SHIFT) |
+		    (timing[2] << EXYNOS_SROM_BCX__TCAH__SHIFT) |
+		    (timing[3] << EXYNOS_SROM_BCX__TCOH__SHIFT) |
+		    (timing[4] << EXYNOS_SROM_BCX__TACC__SHIFT) |
+		    (timing[5] << EXYNOS_SROM_BCX__TCOS__SHIFT) |
+		    (timing[6] << EXYNOS_SROM_BCX__TACS__SHIFT),
+		    srom->reg_base + EXYNOS_SROM_BC0 + bank);
+
+	return 0;
+}
+
 static int exynos_srom_probe(struct platform_device *pdev)
 {
-	struct device_node *np;
+	struct device_node *np, *child;
 	struct exynos_srom *srom;
 	struct device *dev = &pdev->dev;
 
@@ -100,6 +137,9 @@ static int exynos_srom_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
+	for_each_child_of_node(np, child)
+		decode_sromc(srom, child);
+
 	return 0;
 }
 
-- 
2.4.4

[PATCH 3/4] ARM: dts: Add Ethernet chip to SMDK5410

[Pavel Fedin]

The chip is smsc9115, connected via SROMc bank 3. Additionally, some GPIO
initialization is required.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
---
 arch/arm/boot/dts/exynos5410-smdk5410.dts | 42 +++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts
index cebeaab..154e37b 100644
--- a/arch/arm/boot/dts/exynos5410-smdk5410.dts
+++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
@@ -35,6 +35,17 @@
 		reg = <0x02037000 0x1000>;
 	};
 
+	etherhet@07000000 {
+		compatible = "smsc,lan9115";
+		reg = <0x07000000 0x10000>;
+		phy-mode = "mii";
+		interrupt-parent = <&gpx0>;
+		interrupts = <5 8>;
+		reg-io-width = <2>;
+		smsc,irq-push-pull;
+		smsc,force-internal-phy;
+	};
+
 };
 
 &mmc_0 {
@@ -61,6 +72,27 @@
 	disable-wp;
 };
 
+&pinctrl_0 {
+	srom_ctl: srom-ctl {
+		samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
+			       "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-drv = <0>;
+	};
+
+	srom_ebi: srom-ebi {
+		samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
+			       "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
+			       "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
+			       "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
+			       "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
+			       "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <3>;
+		samsung,pin-drv = <0>;
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
@@ -72,3 +104,13 @@
 &uart2 {
 	status = "okay";
 };
+
+&sromc_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
+	bank@3 {
+		bank = <3>;
+		width = <2>;
+		srom-timing = <1 9 12 1 9 1 1>;
+	};
+};
-- 
2.4.4

Re: [PATCH 3/4] ARM: dts: Add Ethernet chip to SMDK5410

[Pankaj Dubey]

Hi Pavel,

On Monday 26 October 2015 05:17 PM, Pavel Fedin wrote:
> The chip is smsc9115, connected via SROMc bank 3. Additionally, some GPIO
> initialization is required.
>
> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
> ---
>   arch/arm/boot/dts/exynos5410-smdk5410.dts | 42 +++++++++++++++++++++++++++++++
>   1 file changed, 42 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts
> index cebeaab..154e37b 100644
> --- a/arch/arm/boot/dts/exynos5410-smdk5410.dts
> +++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts
> @@ -35,6 +35,17 @@
>   		reg = <0x02037000 0x1000>;
>   	};
>
> +	etherhet@07000000 {

%s/etherhet/ethernet/

> +		compatible = "smsc,lan9115";
> +		reg = <0x07000000 0x10000>;
> +		phy-mode = "mii";
> +		interrupt-parent = <&gpx0>;
> +		interrupts = <5 8>;
> +		reg-io-width = <2>;
> +		smsc,irq-push-pull;
> +		smsc,force-internal-phy;
> +	};
> +
>   };
>
>   &mmc_0 {
> @@ -61,6 +72,27 @@
>   	disable-wp;
>   };
>
> +&pinctrl_0 {
> +	srom_ctl: srom-ctl {
> +		samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
> +			       "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
> +		samsung,pin-function = <2>;
> +		samsung,pin-drv = <0>;
> +	};
> +
> +	srom_ebi: srom-ebi {
> +		samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
> +			       "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
> +			       "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
> +			       "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
> +			       "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
> +			       "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
> +		samsung,pin-function = <2>;
> +		samsung,pin-pud = <3>;
> +		samsung,pin-drv = <0>;
> +	};
> +};
> +
>   &uart0 {
>   	status = "okay";
>   };
> @@ -72,3 +104,13 @@
>   &uart2 {
>   	status = "okay";
>   };
> +
> +&sromc_0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
> +	bank@3 {
> +		bank = <3>;
> +		width = <2>;
> +		srom-timing = <1 9 12 1 9 1 1>;
> +	};
> +};
>

Thanks,
Pankaj Dubey

[PATCH 4/4] Documentation: dt-bindings: Describe SROMc configuration

[Pavel Fedin]

Add documentation for new properties, allowing bank configuration.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
---
 .../devicetree/bindings/arm/samsung/exynos-srom.txt   | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
index 33886d5..73750da 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
@@ -5,8 +5,25 @@ Required properties:
 
 - reg: offset and length of the register set
 
-Example:
+Bank configurations can be defined as an optional subnodes. They can have the
+following properties:
+- bank : bank number (0 - 3)
+- width : data width in bytes (1 or 2). If omitted, default of 1 is used.
+- srom-timing : array of 7 integers: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs
+
+Example: basic definition, no banks are configured
+	sromc@12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x10>;
+	};
+
+Example: SROMc with bank3 configuration
 	sromc@12570000 {
 		compatible = "samsung,exynos-srom";
 		reg = <0x12570000 0x10>;
+		bank@3 {
+			bank = <3>;
+			width = <2>;
+			srom-timing = <1 9 12 1 9 1 1>;
+		};
 	};
-- 
2.4.4

Re: [PATCH 4/4] Documentation: dt-bindings: Describe SROMc configuration

[Pankaj Dubey]

Hi Pavel,

On Monday 26 October 2015 05:17 PM, Pavel Fedin wrote:
> Add documentation for new properties, allowing bank configuration.
>
> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
> ---
>   .../devicetree/bindings/arm/samsung/exynos-srom.txt   | 19 ++++++++++++++++++-
>   1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> index 33886d5..73750da 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> @@ -5,8 +5,25 @@ Required properties:
>
>   - reg: offset and length of the register set
>
> -Example:
> +Bank configurations can be defined as an optional subnodes. They can have the
> +following properties:
> +- bank : bank number (0 - 3)
> +- width : data width in bytes (1 or 2). If omitted, default of 1 is used.
> +- srom-timing : array of 7 integers: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs
> +

I think these will be optional properties as all Exynos SoC may not be 
having these. So better to add them under "Optional Properties" heading, 
and move this above the "-Example" heading

> +Example: basic definition, no banks are configured
> +	sromc@12570000 {
> +		compatible = "samsung,exynos-srom";
> +		reg = <0x12570000 0x10>;
> +	};
> +
> +Example: SROMc with bank3 configuration
>   	sromc@12570000 {
>   		compatible = "samsung,exynos-srom";
>   		reg = <0x12570000 0x10>;
> +		bank@3 {
> +			bank = <3>;
> +			width = <2>;
> +			srom-timing = <1 9 12 1 9 1 1>;
> +		};
>   	};
>

Thanks,
Pankaj Dubey

RE: [PATCH 4/4] Documentation: dt-bindings: Describe SROMc configuration

[Pavel Fedin]

 Hello!

> > +Bank configurations can be defined as an optional subnodes. They can have the
> > +following properties:
> > +- bank : bank number (0 - 3)
> > +- width : data width in bytes (1 or 2). If omitted, default of 1 is used.
> > +- srom-timing : array of 7 integers: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs
> > +
> 
> I think these will be optional properties as all Exynos SoC may not be
> having these. So better to add them under "Optional Properties" heading,
> and move this above the "-Example" heading

 Not really. Actually 'bank' is not optional, because it actually identifies to which bank properties are applied, and srom-timings
are settings by themselves. Without both of them the definition just doesn't make sense. The only really optional specifier is
'width', which has a default.
 Could you give me an example of how to write this correctly?

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia