RE: [PATCH 1/3] scsi: ufs: Exynos: Fix DMA alignment for PAGE_SIZE != 4096

["Alim Akhtar" <alim.akhtar@samsung.com>]

Hi Bart

>-----Original Message-----
>From: Bart Van Assche [mailto:bvanassche@acm.org]
>Sent: Saturday, January 7, 2023 3:28 AM
>To: Martin K . Petersen <martin.petersen@oracle.com>
>Cc: Jaegeuk Kim <jaegeuk@kernel.org>; Avri Altman
><avri.altman@wdc.com>; Adrian Hunter <adrian.hunter@intel.com>; linux-
>scsi@vger.kernel.org; Bart Van Assche <bvanassche@acm.org>; Kiwoong Kim
><kwmad.kim@samsung.com>; James E.J. Bottomley <jejb@linux.ibm.com>;
>Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; Bean Huo
><beanhuo@micron.com>; Stanley Chu <stanley.chu@mediatek.com>;
>Jinyoung Choi <j-young.choi@samsung.com>; Chanho Park
><chanho61.park@samsung.com>; Alim Akhtar <alim.akhtar@samsung.com>;
>Arthur Simchaev <Arthur.Simchaev@wdc.com>; Keoseong Park
><keosung.park@samsung.com>; Yoshihiro Shimoda
><yoshihiro.shimoda.uh@renesas.com>
>Subject: [PATCH 1/3] scsi: ufs: Exynos: Fix DMA alignment for PAGE_SIZE !=
>4096
>
>The Exynos UFS controller only supports scatter/gather list elements that
are
>aligned on a 4 KiB boundary. Fix DMA alignment in case PAGE_SIZE != 4096.
>Rename UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE into
>UFSHCD_QUIRK_4KB_DMA_ALIGNMENT.
>
>Cc: Kiwoong Kim <kwmad.kim@samsung.com>
>Fixes: 2b2bfc8aa519 ("scsi: ufs: Introduce a quirk to allow only
page-aligned sg
>entries")
>Signed-off-by: Bart Van Assche <bvanassche@acm.org>
>---
Thanks!

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

Tested on platforms containing Exynos HCI, so feel free to add

Tested-by: Alim Akhtar <alim.akhtar@samsung.com>

> drivers/ufs/core/ufshcd.c     | 4 ++--
> drivers/ufs/host/ufs-exynos.c | 2 +-
> include/ufs/ufshcd.h          | 4 ++--
> 3 files changed, 5 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index
>99ca5b035028..be18edf4ef7f 100644
>--- a/drivers/ufs/core/ufshcd.c
>+++ b/drivers/ufs/core/ufshcd.c
>@@ -5029,8 +5029,8 @@ static int ufshcd_slave_configure(struct scsi_device
>*sdev)
> 	ufshcd_hpb_configure(hba, sdev);
>
> 	blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD -
>1);
>-	if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
>-		blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
>+	if (hba->quirks & UFSHCD_QUIRK_4KB_DMA_ALIGNMENT)
>+		blk_queue_update_dma_alignment(q, 4096 - 1);
> 	/*
> 	 * Block runtime-pm until all consumers are added.
> 	 * Refer ufshcd_setup_links().
>diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c
>index c3628a8645a5..3cdac89a28b8 100644
>--- a/drivers/ufs/host/ufs-exynos.c
>+++ b/drivers/ufs/host/ufs-exynos.c
>@@ -1673,7 +1673,7 @@ static const struct exynos_ufs_drv_data
>exynos_ufs_drvs = {
>
>UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
>
>UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL |
>
>UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING |
>-
>UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE,
>+				  UFSHCD_QUIRK_4KB_DMA_ALIGNMENT,
> 	.opts			= EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL |
>
>EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
> 				  EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX |
>diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index
>dd5912b4db77..583611444f12 100644
>--- a/include/ufs/ufshcd.h
>+++ b/include/ufs/ufshcd.h
>@@ -567,9 +567,9 @@ enum ufshcd_quirks {
> 	UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
>
> 	/*
>-	 * This quirk allows only sg entries aligned with page size.
>+	 * Align DMA SG entries on a 4 KiB boundary.
> 	 */
>-	UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE		= 1 << 14,
>+	UFSHCD_QUIRK_4KB_DMA_ALIGNMENT			= 1 <<
>14,
>
> 	/*
> 	 * This quirk needs to be enabled if the host controller does not