* [PATCH v1 1/2] ufs: core: mcq: Add config_mcq_resource vops
2022-10-26 7:39 [PATCH v1 0/2] Add Mediatek UFS Multi Circular Queue Eddie Huang
@ 2022-10-26 7:39 ` Eddie Huang
2022-10-26 7:39 ` [PATCH v1 2/2] ufs: mtk-host: Add MCQ feature Eddie Huang
1 sibling, 0 replies; 5+ messages in thread
From: Eddie Huang @ 2022-10-26 7:39 UTC (permalink / raw)
To: Asutosh Das, martin.petersen, stanley.chu, bvanassche, linux-scsi
Cc: avri.altman, liang-yen.wang, linux-mediatek, cc.chou, powen.kao,
Eddie Huang
SoCs vendor config MCQ register address resource in
config_mcq_resource vops
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
drivers/ufs/core/ufs-mcq.c | 3 +++
drivers/ufs/core/ufshcd-priv.h | 8 ++++++++
include/ufs/ufshcd.h | 1 +
3 files changed, 12 insertions(+)
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index b51ba35..1fdb45a 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -173,6 +173,9 @@ static int ufshcd_mcq_config_resource(struct ufs_hba *hba)
struct resource *res_mem, *res_mcq;
int i, ret = 0;
+ if (ufshcd_mcq_vops_config_resource(hba) == 0)
+ return 0;
+
memcpy(hba->res, ufs_res_info, sizeof(ufs_res_info));
for (i = 0; i < RES_MAX; i++) {
diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 6e9bec6..2f71b0e 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -257,6 +257,14 @@ static inline int ufshcd_vops_get_outstanding_cqs(struct ufs_hba *hba,
return -EOPNOTSUPP;
}
+static inline int ufshcd_mcq_vops_config_resource(struct ufs_hba *hba)
+{
+ if (hba->vops && hba->vops->config_mcq_resource)
+ return hba->vops->config_mcq_resource(hba);
+
+ return -EOPNOTSUPP;
+}
+
extern const struct ufs_pm_lvl_states ufs_pm_lvl_states[];
/**
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 506fc6e..be323c9 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -339,6 +339,7 @@ struct ufs_hba_variant_ops {
int (*op_runtime_config)(struct ufs_hba *hba);
int (*get_outstanding_cqs)(struct ufs_hba *hba,
unsigned long *ocqs);
+ int (*config_mcq_resource)(struct ufs_hba *hba);
};
/* clock gating state */
--
2.9.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v1 2/2] ufs: mtk-host: Add MCQ feature
2022-10-26 7:39 [PATCH v1 0/2] Add Mediatek UFS Multi Circular Queue Eddie Huang
2022-10-26 7:39 ` [PATCH v1 1/2] ufs: core: mcq: Add config_mcq_resource vops Eddie Huang
@ 2022-10-26 7:39 ` Eddie Huang
2022-10-26 8:42 ` AngeloGioacchino Del Regno
1 sibling, 1 reply; 5+ messages in thread
From: Eddie Huang @ 2022-10-26 7:39 UTC (permalink / raw)
To: Asutosh Das, martin.petersen, stanley.chu, bvanassche, linux-scsi
Cc: avri.altman, liang-yen.wang, linux-mediatek, cc.chou, powen.kao,
Eddie Huang
Add Mediatek mcq resource and runtime configuration function
to support MCQ capability
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
drivers/ufs/host/ufs-mediatek.c | 37 +++++++++++++++++++++++++++++++++++++
drivers/ufs/host/ufs-mediatek.h | 7 +++++++
2 files changed, 44 insertions(+)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index c958279..3f5fc05 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -31,6 +31,8 @@
#define CREATE_TRACE_POINTS
#include "ufs-mediatek-trace.h"
+#define MCQ_QUEUE_OFFSET(c) ((((c) >> 16) & 0xFF) * 0x200)
+
static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
{ .wmanufacturerid = UFS_ANY_VENDOR,
.model = UFS_ANY_MODEL,
@@ -833,6 +835,8 @@ static int ufs_mtk_init(struct ufs_hba *hba)
host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
+ hba->caps |= UFSHCD_CAP_MCQ_EN;
+
goto out;
out_variant_clear:
@@ -1314,6 +1318,37 @@ static void ufs_mtk_event_notify(struct ufs_hba *hba,
trace_ufs_mtk_event(evt, val);
}
+static int ufs_mtk_op_runtime_config(struct ufs_hba *hba)
+{
+ struct ufshcd_mcq_opr_info_t *opr;
+ int i;
+
+ for (i = 0; i < OPR_MAX; i++) {
+ opr = &hba->mcq_opr[i];
+ opr->stride = REG_UFS_MCQ_STRIDE;
+ }
+
+ hba->mcq_opr[OPR_SQD].offset = REG_UFS_MTK_SQD;
+ hba->mcq_opr[OPR_SQIS].offset = REG_UFS_MTK_SQIS;
+ hba->mcq_opr[OPR_CQD].offset = REG_UFS_MTK_CQD;
+ hba->mcq_opr[OPR_CQIS].offset = REG_UFS_MTK_CQIS;
+
+ hba->mcq_opr[OPR_SQD].base = hba->mmio_base + REG_UFS_MTK_SQD;
+ hba->mcq_opr[OPR_SQIS].base = hba->mmio_base + REG_UFS_MTK_SQIS;
+ hba->mcq_opr[OPR_CQD].base = hba->mmio_base + REG_UFS_MTK_CQD;
+ hba->mcq_opr[OPR_CQIS].base = hba->mmio_base + REG_UFS_MTK_CQIS;
+
+ return 0;
+}
+
+static int ufs_mtk_config_mcq_resource(struct ufs_hba *hba)
+{
+ hba->mcq_base = hba->mmio_base +
+ MCQ_QUEUE_OFFSET(hba->mcq_capabilities);
+
+ return 0;
+}
+
/*
* struct ufs_hba_mtk_vops - UFS MTK specific variant operations
*
@@ -1335,6 +1370,8 @@ static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
.dbg_register_dump = ufs_mtk_dbg_register_dump,
.device_reset = ufs_mtk_device_reset,
.event_notify = ufs_mtk_event_notify,
+ .op_runtime_config = ufs_mtk_op_runtime_config,
+ .config_mcq_resource = ufs_mtk_config_mcq_resource,
};
/**
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index aa26d41..febf702 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -26,6 +26,13 @@
#define REG_UFS_DEBUG_SEL_B2 0x22D8
#define REG_UFS_DEBUG_SEL_B3 0x22DC
+#define REG_UFS_MTK_SQD 0x2800
+#define REG_UFS_MTK_SQIS 0x2814
+#define REG_UFS_MTK_CQD 0x281C
+#define REG_UFS_MTK_CQIS 0x2824
+
+#define REG_UFS_MCQ_STRIDE 0x30
+
/*
* Ref-clk control
*
--
2.9.2
^ permalink raw reply related [flat|nested] 5+ messages in thread