Linux SCSI subsystem development
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From: Bart Van Assche <bvanassche@acm.org>
To: peter.wang@mediatek.com, linux-scsi@vger.kernel.org,
	martin.petersen@oracle.com
Cc: wsd_upstream@mediatek.com, linux-mediatek@lists.infradead.org,
	chun-hung.wu@mediatek.com, alice.chao@mediatek.com,
	cc.chou@mediatek.com, chaotian.jing@mediatek.com,
	jiajie.hao@mediatek.com, qilin.tan@mediatek.com,
	lin.gui@mediatek.com, tun-yu.yu@mediatek.com,
	eddie.huang@mediatek.com, naomi.chu@mediatek.com,
	ed.tsai@mediatek.com
Subject: Re: [PATCH v1 1/2] ufs: core: update CQ Entry to UFS 4.1 format
Date: Tue, 14 Oct 2025 08:44:14 -0700	[thread overview]
Message-ID: <ef1ede40-3ff9-4ff3-9752-1037a55cc516@acm.org> (raw)
In-Reply-To: <20251014131758.270324-2-peter.wang@mediatek.com>


On 10/14/25 6:15 AM, peter.wang@mediatek.com wrote:
> diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h
> index 612500a7088f..8b14f6e5e6f5 100644
> --- a/include/ufs/ufshci.h
> +++ b/include/ufs/ufshci.h
> @@ -567,10 +567,19 @@ struct cq_entry {
>   	__le16  prd_table_offset;
>   
>   	/* DW 4 */
> -	__le32 status;
> -
> -	/* DW 5-7 */
> -	__le32 reserved[3];
> +	u8 overall_status;
> +	u8 extended_error_code;
> +	__le16 reserved_1;
> +
> +	/* DW 5 */
> +	u8 task_tag;
> +	u8 lun;
> +	u8 iid:4;
> +	u8 ext_iid:4;
> +	u8 reserved_2;
> +
> +	/* DW 6-7 */
> +	__le32 reserved_3[2];
>   };

The above definition is only correct for little endian CPUs. If you 
really want to use bitfields, please take a look at struct
request_desc_header for making bitfield definitions work for both little
and big endian CPUs.

Bart.

  reply	other threads:[~2025-10-14 15:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-14 13:15 [PATCH v1 0/2] update CQ entry and dump CQE in MCQ mode peter.wang
2025-10-14 13:15 ` [PATCH v1 1/2] ufs: core: update CQ Entry to UFS 4.1 format peter.wang
2025-10-14 15:44   ` Bart Van Assche [this message]
2025-10-15  5:58     ` Peter Wang (王信友)
2025-10-14 13:15 ` [PATCH v1 2/2] ufs: core: support dumping CQ entry in MCQ Mode peter.wang
2025-10-14 15:46   ` Bart Van Assche
2025-10-15  6:14     ` Peter Wang (王信友)
2025-10-15 16:00       ` Bart Van Assche
2025-10-16  2:12         ` Peter Wang (王信友)

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