[PATCH] scsi: vmw_pvscsi: add support for ARM64 architecture

[PATCH] scsi: vmw_pvscsi: add support for ARM64 architecture

[Matt Wang]

This change adds PVSCSI support for the ARM64 architecture, restricted
to little endian and 4K memory page size. Barrier usage is updated from
compiler barriers, which were sufficient on x86, to the appropriate dma
barriers.

Signed-off-by: Matt Wang <matt.wang@broadcom.com>
---
 drivers/scsi/Kconfig      |  3 ++-
 drivers/scsi/vmw_pvscsi.c | 40 ++++++++++++++++++++-------------------
 2 files changed, 23 insertions(+), 20 deletions(-)

diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index fc8e8b0bf..4503d7ba8 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -569,7 +569,8 @@ config SCSI_MYRS
 
 config VMWARE_PVSCSI
 	tristate "VMware PVSCSI driver support"
-	depends on PCI && SCSI && X86
+	depends on PCI && SCSI
+	depends on X86 || (ARM64 && !CPU_BIG_ENDIAN && PAGE_SIZE_4KB)
 	help
 	  This driver supports VMware's para virtualized SCSI HBA.
 	  To compile this driver as a module, choose M here: the
diff --git a/drivers/scsi/vmw_pvscsi.c b/drivers/scsi/vmw_pvscsi.c
index 151cac9f9..f6098e51e 100644
--- a/drivers/scsi/vmw_pvscsi.c
+++ b/drivers/scsi/vmw_pvscsi.c
@@ -650,12 +650,18 @@ static void pvscsi_complete_request(struct pvscsi_adapter *adapter,
 }
 
 /*
- * barrier usage : Since the PVSCSI device is emulated, there could be cases
- * where we may want to serialize some accesses between the driver and the
- * emulation layer. We use compiler barriers instead of the more expensive
- * memory barriers because PVSCSI is only supported on X86 which has strong
- * memory access ordering.
+ * The completion consumer index must be incremented only after the completion
+ * entry is read. The read memory barrier combined with READ/WRITE_ONCE
+ * ensures that all reads from the entry happen before the increment.
  */
+static void pvscsi_increment_cons_idx(u32 *cons_idx)
+{
+	u32 new_cons_idx;
+	dma_rmb();
+	new_cons_idx = READ_ONCE(*cons_idx) + 1;
+	WRITE_ONCE(*cons_idx, new_cons_idx);
+}
+
 static void pvscsi_process_completion_ring(struct pvscsi_adapter *adapter)
 {
 	struct PVSCSIRingsState *s = adapter->rings_state;
@@ -666,21 +672,14 @@ static void pvscsi_process_completion_ring(struct pvscsi_adapter *adapter)
 		struct PVSCSIRingCmpDesc *e = ring + (s->cmpConsIdx &
 						      MASK(cmp_entries));
 		/*
-		 * This barrier() ensures that *e is not dereferenced while
+		 * This barrier ensures that *e is not dereferenced while
 		 * the device emulation still writes data into the slot.
 		 * Since the device emulation advances s->cmpProdIdx only after
 		 * updating the slot we want to check it first.
 		 */
-		barrier();
+		dma_rmb();
 		pvscsi_complete_request(adapter, e);
-		/*
-		 * This barrier() ensures that compiler doesn't reorder write
-		 * to s->cmpConsIdx before the read of (*e) inside
-		 * pvscsi_complete_request. Otherwise, device emulation may
-		 * overwrite *e before we had a chance to read it.
-		 */
-		barrier();
-		s->cmpConsIdx++;
+		pvscsi_increment_cons_idx(&s->cmpConsIdx);
 	}
 }
 
@@ -764,7 +763,11 @@ static int pvscsi_queue_ring(struct pvscsi_adapter *adapter,
 
 	e->context = pvscsi_map_context(adapter, ctx);
 
-	barrier();
+	/*
+	 * Ensure writes to the request entry are done before
+	 * transferring ownership.
+	 */
+	dma_wmb();
 
 	s->reqProdIdx++;
 
@@ -1105,10 +1108,9 @@ static void pvscsi_process_msg_ring(const struct pvscsi_adapter *adapter)
 		struct PVSCSIRingMsgDesc *e = ring + (s->msgConsIdx &
 						      MASK(msg_entries));
 
-		barrier();
+		dma_rmb();
 		pvscsi_process_msg(adapter, e);
-		barrier();
-		s->msgConsIdx++;
+		pvscsi_increment_cons_idx(&s->msgConsIdx);
 	}
 }
 
-- 
2.52.0

Re: [PATCH] scsi: vmw_pvscsi: add support for ARM64 architecture

[Vishal Bhakta]

On 10/18/2026 11:29 PM, Matt Wang wrote:
> This change adds PVSCSI support for the ARM64 architecture, restricted
> to little endian and 4K memory page size. Barrier usage is updated from
> compiler barriers, which were sufficient on x86, to the appropriate dma
> barriers.
Reviewed-by: Vishal Bhakta <vishal.bhakta@broadcom.com>

Re: [PATCH] scsi: vmw_pvscsi: add support for ARM64 architecture

[Martin K. Petersen]

Matt,

> This change adds PVSCSI support for the ARM64 architecture, restricted
> to little endian and 4K memory page size. Barrier usage is updated
> from compiler barriers, which were sufficient on x86, to the
> appropriate dma barriers.

Applied to 7.5/scsi-staging, thanks!

-- 
Martin K. Petersen