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* [PATCH 2/2] serial: 8250_pci: change BayTrail default uartclk
       [not found] <694295964.81260.1393897982162.JavaMail.zimbra@xes-inc.com>
@ 2014-03-04  1:54 ` Aaron Sierra
  2014-03-04 14:55   ` Heikki Krogerus
  0 siblings, 1 reply; 2+ messages in thread
From: Aaron Sierra @ 2014-03-04  1:54 UTC (permalink / raw)
  To: linux-serial; +Cc: Greg Kroah-Hartman, Heikki Krogerus

The Intel BayTrail HSUART power-on default reference clock is 44.2368 MHz,
but 73.728 MHz provides 0% error for additional "conventional" baud rates
above 460800 (e.g. 576000, 921600, and 1152000).

Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
---
 drivers/tty/serial/8250/8250_pci.c |   10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index e4289b2..75398af 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1400,9 +1400,9 @@ byt_set_termios(struct uart_port *p, struct ktermios *termios,
 		p->uartclk = 40000000;
 		break;
 	default:
-		m = 6912;
-		n = 15625;
-		p->uartclk = 44236800;
+		m = 2304;
+		n = 3125;
+		p->uartclk = 73728000;
 	}
 
 	/* Reset the clock */
@@ -3469,6 +3469,10 @@ static struct pciserial_board pci_boards[] = {
 		.base_baud	= 921600,
 		.reg_shift      = 2,
 	},
+	/*
+	 * Intel BayTrail HSUART reference clock is 44.2368 MHz at power-on,
+	 * but is overridden by byt_set_termios.
+	 */
 	[pbn_byt] = {
 		.flags		= FL_BASE0,
 		.num_ports	= 1,
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH 2/2] serial: 8250_pci: change BayTrail default uartclk
  2014-03-04  1:54 ` [PATCH 2/2] serial: 8250_pci: change BayTrail default uartclk Aaron Sierra
@ 2014-03-04 14:55   ` Heikki Krogerus
  0 siblings, 0 replies; 2+ messages in thread
From: Heikki Krogerus @ 2014-03-04 14:55 UTC (permalink / raw)
  To: Aaron Sierra; +Cc: linux-serial, Greg Kroah-Hartman

On Mon, Mar 03, 2014 at 07:54:36PM -0600, Aaron Sierra wrote:
> The Intel BayTrail HSUART power-on default reference clock is 44.2368 MHz,
> but 73.728 MHz provides 0% error for additional "conventional" baud rates
> above 460800 (e.g. 576000, 921600, and 1152000).
> 
> Signed-off-by: Aaron Sierra <asierra@xes-inc.com>

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>

Thanks,

-- 
heikki

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2014-03-04  1:54 ` [PATCH 2/2] serial: 8250_pci: change BayTrail default uartclk Aaron Sierra
2014-03-04 14:55   ` Heikki Krogerus

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